Changeset 3368
 Timestamp:
 Oct 13, 2012, 3:41:13 AM (2 years ago)
 File:

 1 edited
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cpu/arm/mmp2/irq.fth
r3356 r3368 6 6 " interruptcontroller" devicename 7 7 \ myaddress myspace h# 400 reg 8 [ifdef] mmp3 9 h# d4282000 encodeint h# 1000 encodeint encode+ 10 h# d4284000 encodeint encode+ h# 100 encodeint encode+ " reg" property 11 [else] 8 12 myaddress myspace h# 1000 reg 13 [then] 9 14 10 15 0 value baseadr … … 47 52 48 53 " mrvl,mmp2intc" " compatible" stringproperty 54 [ifdef] mmp3 " mrvl,mmp3intc" +compatible [then] 55 49 56 1 " #addresscells" integerproperty 50 57 1 " #sizecells" integerproperty … … 98 105 h# 128 h# 11c d# 48 d# 24 makemuxnode \ DMA mux  16 PDMA, 4 ADMA, 2 VDMA channels 99 106 100 0 [if]101 newdevice102 " interruptcontroller" name103 " mrvl,mmp2muxintc" +compatible104 105 0 0106 h# 150 encodeint encode+ 4 encodeint encode+107 h# 168 encodeint encode+ 4 encodeint encode+ " reg" property108 \ h# 150 " mrvl,intcstatus" integerproperty109 \ h# 168 " mrvl,intcmask" integerproperty110 111 4 " interrupts" integerproperty112 d# 2 " mrvl,intcnrirqs" integerproperty113 \ 0: USB_CHARGER 1: PMIC114 finishdevice115 116 newdevice117 " interruptcontroller" name118 " mrvl,mmp2muxintc" +compatible119 120 0 0121 h# 154 encodeint encode+ 4 encodeint encode+122 h# 16c encodeint encode+ 4 encodeint encode+ " reg" property123 124 5 " interrupts" integerproperty125 d# 2 " mrvl,intcnumbers" integerproperty126 d# 1 " mrvl,clrmfpirq" integerproperty127 \ 0: RTC_ALARM 1: RTC128 finishdevice129 130 newdevice131 " interruptcontroller" name132 133 " mrvl,mmp2muxintc" +compatible134 135 0 0136 h# 180 encodeint encode+ 4 encodeint encode+137 h# 17c encodeint encode+ 4 encodeint encode+ " reg" property138 139 d# 9 " interrupts" integerproperty140 d# 3 " mrvl,intcnumbers" integerproperty141 \ 0:KPC (keypad) 1:ROT (rotary) 2: TBALL (trackball)142 \ h# 15c " mrvl,intcstatus" integerproperty143 \ h# 174 " mrvl,intcmask" integerproperty144 finishdevice145 146 newdevice147 " interruptcontroller" name148 " mrvl,mmp2muxintc" +compatible149 150 0 0151 h# 158 encodeint encode+ 4 encodeint encode+152 h# 170 encodeint encode+ 4 encodeint encode+ " reg" property153 154 d# 17 " interrupts" integerproperty155 d# 5 " mrvl,intcnumbers" integerproperty156 \ 0: TWSI2 1: TWSI3 2: TWSI4 3: TWSI5 4: TWSI6157 finishdevice158 159 newdevice160 " interruptcontroller" name161 162 " mrvl,mmp2muxintc" +compatible163 164 0 0165 h# 15c encodeint encode+ 4 encodeint encode+166 h# 174 encodeint encode+ 4 encodeint encode+ " reg" property167 \ h# 15c " mrvl,intcstatus" integerproperty168 \ h# 174 " mrvl,intcmask" integerproperty169 170 d# 35 " interrupts" integerproperty171 d# 15 " mrvl,intcnumbers" integerproperty172 \ 0: PERF 1: L2_PA_ECC 2: L2_ECC 3: L2_UECC 4: DDR173 \ 5: FABRIC0_TO 6: FABRIC1_TO 7: FABRIC2_TO 8: resv 9: THERMAL174 \ 10: MAIN_PMU 11: WDT2 12: CORESIGHT 13: COMMTX 14: COMMRX175 finishdevice176 177 newdevice178 " interruptcontroller" name179 0 0 " interruptcontroller" property180 " mrvl,mmp2muxintc" +compatible181 182 0 0183 h# 160 encodeint encode+ 4 encodeint encode+184 h# 178 encodeint encode+ 4 encodeint encode+ " reg" property185 186 d# 51 " interrupts" integerproperty187 d# 2 " mrvl,intcnumbers" integerproperty188 \ 0:HSI_CAWAKE 1:MIPI_HSI_INT1189 \ h# 15c " mrvl,intcstatus" integerproperty190 \ h# 174 " mrvl,intcmask" integerproperty191 finishdevice192 [then]193 194 107 endpackage 195 108
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