Changeset 3247

Timestamp:

Aug 29, 2012 9:00:05 PM (9 months ago)

Author:

wmb

Message:

OLPC ARM - Ensure that the main SDHC clock divisor is set properly when changing the SDH1 clock register.

File:

• cpu/arm/mmp2/pmua.fth (modified) (1 diff)

cpu/arm/mmp2/pmua.fth

@@ -83 +83 @@
 h# 04c +int  h# fffff +int  h#  71b +int  d# 400,000,000 +int  \ 1 DISPLAY1
 h# 050 +int  h#    3f +int  h#   3f +int  d#           0 +int  \ 2 CCIC
-h# 054 +int  h#    1b +int  h#   1b +int  d# 200,000,000 +int  \ 3 SDH1
+h# 054 +int  h#    1b +int  h#  41b +int  d# 200,000,000 +int  \ 3 SDH1
 h# 058 +int  h#    1b +int  h#   1b +int  d# 200,000,000 +int  \ 4 SDH2
 h# 05c +int  h#    09 +int  h#   09 +int  d# 480,000,000 +int  \ 5 USB