Changeset 3163

Timestamp:

Aug 13, 2012 10:41:29 PM (10 months ago)

Author:

wmb

Message:

SDHCI driver - Wait for write operations to complete more aggressively than before. This fixes a fs-update problem with XO-4. I'm not entirely convinced that this is the right fix, so it probably needs more study, but for now, it seems to work.

File:

• dev/mmc/sdhci/sdhci.fth (modified) (5 diffs)

dev/mmc/sdhci/sdhci.fth

@@ -451 +451 @@
 : mmc-switch  ( arg -- )    \ CMD6 for MMC - no data
    h# 061b 0 cmd  response  h# 80 and  if  ." MMC SWITCH_ERROR" cr  then
+   2 wait  \ This command appears to have a transfer-complete
 ;
 
@@ -459 +460 @@
    \ Specification says that Transfer Complete is set after R1b
    \ commands, so we must clear that bit if it is set.
+   d# 16 ms   \ Give the operation time to complete
    isr@ isr!
 ;
@@ -761 +763 @@
       \ Ideally, the width selection would be done by using CMD19 to test the bus
       hc-supports-8-bit?  if
-         mmc-8-bit  1 ms  8-bit
+         mmc-8-bit  8-bit
       else
-         mmc-4-bit  1 ms  4-bit
+         mmc-4-bit  4-bit
       then
 
@@ -1062 +1064 @@
 ;
 
+: wait-dat  ( -- )  d# 10 ms  begin  2 ms present-state@  4 and  0= until  ;
+
 \ Wait for completion
 : r/w-blocks-end  ( in? -- error? )
    drop
+   wait-dat
    wait-dma-done
    intstat-on  wait-write-done  intstat-off
@@ -1093 +1098 @@
 ;
 : fresh-write-blocks-start  ( addr block# #blocks -- error? )
+   intstat-on
+   wait-dat
    false true r/w-blocks-start
 ;