Changeset 3085
- Timestamp:
- Jul 27, 2012 4:54:42 AM (10 months ago)
- File:
-
- 1 edited
-
cpu/arm/olpc/edi.fth (modified) (9 diffs)
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cpu/arm/olpc/edi.fth
r2805 r3085 13 13 \ spi-out ( byte -- ) - Send byte 14 14 \ spi-in ( -- byte ) - Receive byte 15 16 0 value edi-chip-id 17 : kb9010? ( -- flag ) edi-chip-id 4 = ; 18 19 : efcfg ( -- reg# ) kb9010? if h# fea0 else h# fead then ; 20 : efcmd ( -- reg# ) kb9010? if h# fea7 else h# feac then ; 21 : efdat ( -- reg# ) kb9010? if h# feaa else h# feab then ; 22 : rst8051 ( -- reg# ) kb9010? if h# f010 else h# ff14 then ; 23 24 \ Issues with .py code 25 \ A14:A8 should be A15:A8 several places 26 \ inconsistent use of handle vs gd.handle in edi_erase_chip 27 28 \ KB9010 stuff... 29 d# 59 d# 1024 * constant /kb9010-flash 30 h# fe80 constant wdtcfg 31 h# fe81 constant wdtpf 32 h# fe82 constant wdt 33 h# fea2 constant shccfg 34 \ h# fea5 constant xbicfg \ Unused 35 h# fea6 constant xbics 36 \ h# feae constant efdatr \ Unused 37 \ h# feaf constant emfburw 38 h# feb2 constant xbiwp 39 \ h# feb6 constant xbipump 40 \ h# feb7 constant xbifm 41 \ h# feb8 constant sbivr 42 h# feb9 constant xbis 43 h# ff0d constant clkcfg 44 h# ff0f constant pllcfg 45 h# ff1d constant ecsts 46 h# ff1f constant pllcfg2 47 h# ff14 constant pxcfg 48 49 \ end KB9010 stuff... 15 50 16 51 d# 128 constant /flash-page … … 74 109 [then] 75 110 : reset-8051 ( -- ) \ Reset 8-5 76 h# f010 edi-b@ 1 or h# f010edi-b!111 rst8051 edi-b@ 1 or rst8051 edi-b! 77 112 ; 78 113 : unreset-8051 ( -- ) \ Reset 8-5 79 h# f010 edi-b@ 1 invert and h# f010edi-b!114 rst8051 edi-b@ 1 invert and rst8051 edi-b! 80 115 d# 2000 ms 81 116 ; … … 83 118 \ 0 in bit 0 selects masked ROM as code source for 8051, 1 selects FLASH 84 119 \ The 8051 should be in reset mode when changing that bit. 120 85 121 : select-flash ( -- ) \ Setup for access to FLASH inside the EC 122 kb9010? if exit then 86 123 h# f011 edi-b@ 1 or h# f011 edi-b! 124 ; 125 126 : edi-read-id ( -- id ) 127 spi-cs-on h# 3e spi-out 0 spi-out spi-in spi-cs-off 87 128 ; 88 129 … … 96 137 ; 97 138 139 : finished? ( b -- flag ) 140 kb9010? if 2 and 0= else h# 80 = then 141 ; 98 142 : wait-flash-busy ( -- ) \ Wait for an erase/programming operation to complete 99 143 get-msecs h# 1000 + ( limit ) 100 144 begin ( limit ) 101 h# fea0 edi-b@( limit b )102 h# 80 andif ( limit )103 drop exit 145 efcfg edi-b@ ( limit b ) 146 finished? if ( limit ) 147 drop exit ( -- ) 104 148 then ( limit ) 105 149 dup get-msecs - 0<= ( limit timeout? ) … … 109 153 ; 110 154 111 : flash-cmd ( b -- ) h# fea7edi-b! ;155 : flash-cmd ( b -- ) efcmd edi-b! ; 112 156 113 157 : set-offset ( offset -- ) 114 wbsplit ( offset-low offset-hi ) 115 h# fea9 edi-b! h# fea8 edi-b! ( ) 158 lbsplit drop ( offset-low mid hi ) 159 kb9010? if h# feaa edi-b! else drop then ( offset-low mid ) 160 h# fea9 edi-b! h# fea8 edi-b! ( ) 116 161 ; 117 162 … … 122 167 ; 123 168 124 : erase-chip ( -- ) wait-flash-busy h# 60 flash-cmd wait-flash-busy ; 125 126 : send-byte ( b offset -- ) set-offset h# feaa edi-b! 2 flash-cmd ; 169 : erase-chip ( -- ) 170 0 set-offset \ New code does this (and does not wait-flash-busy) 171 wait-flash-busy h# 60 flash-cmd wait-flash-busy 172 ; 173 174 : send-byte ( b offset -- ) set-offset efdat edi-b! 2 flash-cmd ; 127 175 128 176 : edi-program-page ( adr offset -- ) 129 177 \ Clear HVPL 130 178 wait-flash-busy h# 80 flash-cmd ( adr offset ) 179 180 wait-flash-busy ( adr offset ) \ Necessary? 131 181 132 182 \ Fill the page buffer … … 139 189 \ Commit the buffer to the FLASH memory 140 190 wait-flash-busy ( ) \ Redundant wait? 141 h# 70 flash-cmd ( ) 191 h# 70 flash-cmd ( ) \ Program page command 142 192 wait-flash-busy ( ) 143 193 ; … … 163 213 loop ( ) 164 214 ; 215 165 216 : trim@ ( offset -- b ) 166 217 set-offset 167 218 h# 90 flash-cmd 168 219 wait-flash-busy 169 h# feab edi-b@220 efdat edi-b@ \ reg: efdat 170 221 ; 171 222 : trim-tune ( -- ) … … 227 278 \ then 228 279 ; 280 : set-chip-id ( -- ) 281 ['] edi-read-id catch if ( ) 282 edi-read-id ( id ) 283 then ( id ) 284 to edi-chip-id 285 ; 286 : kb9010-init ( -- ) 287 h# 00 xbics edi-b! 288 h# 00 xbiwp edi-b! \ Clear XBI write protection 289 h# ff wdt edi-b! \ Disable WDT 290 h# 00 wdtcfg edi-b! 291 h# 00 wdtpf edi-b! 292 h# 00 shccfg edi-b! \ Disable SHC 293 h# 0c clkcfg edi-b! \ Set the 8051 to 32Mhz 294 h# 08 efcfg edi-b! \ Enable the embedded flash cmd mode 295 ; 296 base @ hex 297 create special-row 1f0 w, 1f1 w, 1f2 w, 1f4 w, 1f5 w, 1f6 w, 1f3 w, 298 create dest-regs feb9 w, feb6 w, feb6 w, feb7 w, feb8 w, feb8 w, feb7 w, 299 create source-bits 1f c, 0f c, 0f c, 0f c, 07 c, 1f c, 0f c, 300 create dest-bits 1f c, f0 c, 0f c, 0f c, e0 c, 1f c, f0 c, 301 create shift-cnt 0 c, 4 c, 0 c, 0 c, 5 c, 0 c, 4 c, 302 base ! 303 : kb9010-trimtune ( -- ) 304 h# 1ff trim@ 0<> if 305 7 0 do 306 special-row i wa+ w@ edi-b@ ( data ) 307 source-bits i ca+ c@ or ( field ) 308 shift-cnt i ca+ c@ lshift ( field' ) 309 dest-regs i wa+ w@ edi-b@ ( field dest ) 310 dest-bits i ca+ c@ invert and or ( dest' ) 311 dest-regs i wa+ w@ edi-b! ( ) 312 loop 313 wait-flash-busy 314 then 315 h# 80 trim@ h# 5a = if 316 ecsts edi-b@ ( old-ecsts ) 317 dup 4 or ecsts edi-b! ( old-ecsts ) \ chipid is now pllcfg2 318 319 xbis edi-b@ h# 3f and ( old-ecsts xbis-bits ) 320 h# 81 edi-b@ 3 and 6 lshift or ( old-ecsts xbis-value ) 321 xbis edi-b! ( old-ecsts ) 322 323 h# 82 edi-b@ h# f and 4 lshift ( old-ecsts pll-high ) 324 h# 83 edi-b@ h# f0 and 4 rshift or ( old-ecsts pll-value ) 325 pllcfg edi-b! ( old-ecsts ) 326 327 pllcfg2 edi-b@ h# 3f and ( old-ecsts pll2-bits ) 328 h# 82 edi-b@ h# 30 and 2 lshift or ( old-ecsts pll2-value ) 329 pllcfg2 edi-b! ( old-ecsts ) 330 331 ecsts edi-b! ( ) 332 then 333 ; 229 334 : edi-open ( -- ) 230 335 \ slow-edi-clock \ Target speed between 1 and 2 MHz 231 336 spi-start 337 338 set-chip-id 339 232 340 \ The first operation often fails so retry it 233 341 ['] select-flash catch if select-flash then 234 342 reset-8051 235 trim-tune 343 344 kb9010? if 345 kb9010-init 346 kb9010-trimtune 347 else 348 trim-tune 349 then 236 350 \ fast-edi-clock \ Target speed up to 16 MHz 237 351 \ reset
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