Changeset 2894
- Timestamp:
- Mar 16, 2012 2:02:28 AM (15 months ago)
- File:
-
- 1 edited
-
cpu/arm/mmp2/timer.fth (modified) (3 diffs)
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cpu/arm/mmp2/timer.fth
r2629 r2894 22 22 ; 23 23 24 [ifdef] arm-assembler 24 \ The first ldr usually returns stale data; the second one returns good data. 25 \ Empirically, draining the write buffer does not help. 26 \ Read-until-match doesn't work with the fast clock because it never matches. 25 27 code timer0@ ( -- n ) \ 6.5 MHz 26 28 psh tos,sp … … 28 30 mov r0,#1 29 31 str r0,[r1,#0xa4] 30 mov r0,r031 ldr tos,[r1,#0x 28]32 ldr tos,[r1,#0xa4] 33 ldr tos,[r1,#0xa4] 32 34 c; 33 35 36 \ For the slower timers, we use the read-until-match technique. 37 \ Apparently the freeze register doesn't update until the next 38 \ clock tick, so using it doesn't work well for the slow clocks. 34 39 code timer1@ ( -- n ) \ 32.768 kHz 35 40 psh tos,sp 36 41 set r1,`h# 014000 +io #` 37 mov r0,#138 str r0,[r1,#0xa8]39 mov r0,r040 42 ldr tos,[r1,#0x2c] 43 begin 44 mov r0,tos 45 ldr tos,[r1,#0x2c] 46 cmps tos,r0 47 = until 41 48 c; 42 49 … … 44 51 psh tos,sp 45 52 set r1,`h# 014000 +io #` 46 mov r0,#147 str r0,[r1,#0xac]48 mov r0,r049 53 ldr tos,[r1,#0x30] 54 begin 55 mov r0,tos 56 ldr tos,[r1,#0x30] 57 cmps tos,r0 58 = until 50 59 c; 51 60 [else] 52 : timer0@ ( -- n ) 1 h# 0140a4 io! h# 0140 28io@ ;53 : timer1@ ( -- n ) 1 h# 0140a8 io! h# 0140 2cio@ ;54 : timer2@ ( -- n ) 1 h# 0140ac io! h# 0140 30io@ ;61 : timer0@ ( -- n ) 1 h# 0140a4 io! h# 0140a4 io@ drop h# 0140a4 io@ ; 62 : timer1@ ( -- n ) 1 h# 0140a8 io! h# 0140a8 io@ drop h# 0140a8 io@ ; 63 : timer2@ ( -- n ) 1 h# 0140ac io! h# 0140ac io@ drop h# 0140ac io@ ; 55 64 [then] 56 65
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