Changeset 2696


Ignore:
Timestamp:
Nov 21, 2011, 11:33:47 PM (3 years ago)
Author:
wmb
Message:

OLPC XO-1.75 - Configurable sleep code, configured for manual memory controller wakeup

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpu/arm/mmp2/dramrecal.fth

    r2674 r2696  
    5959here ddr-recal - constant /ddr-recal
    6060
     61\ create use-auto-mc-wake  \ Let the PMU automatically wake the memory controller
     62create use-block           \ Block memory controller activity in low-level sleep code
     63create use-self-refresh    \ Manually issue self-refresh enter/exit
     64create use-drivers         \ Turn memory drivers off during sleep
     65\ create use-phy-dll-reset \ Reset the PHY DLL upon wakeup
     66create use-phy-dll-update  \ Update the PHY DLL upon wakeup
     67create use-dram-dll-reset  \ Reset the DRAM DLL upon wakeup
     68\ create use-delay2        \ Long delay upon wakeup
     69\ create use-delay3        \ Short delay upon wakeup
     70
    6171label ddr-self-refresh  ( r0:memctrl-va -- )
     72[ifdef] use-gpio
     73   mov     r4, #0xfe000000
     74   orr     r4, r4, 0x19000   \ GPIO 3
     75   mov     r1, 0x8           \ GPIO 3
     76   str     r1, [r4, #0x18]   \ Set
     77[then]
     78
     79[ifdef] use-block
    6280   mov     r1, #0x1          \ Block all data requests
    6381   str     r1, [r0, #0x7e0]  \ SDRAM_CTRL14
    64 
    65 [ifdef] notdef2
     82[then]
     83
     84[ifdef] use-odt
    6685   ldr   r2, [r0, #0x770]    \ SDRAM_CTRL7_SDRAM_ODT_CTRL2
    6786   orr   r1, r2, #0x03000000 \ PAD_TERM_SWITCH_MODE: Termination disabled
     
    6988[then]
    7089
     90[ifdef] use-self-refresh
    7191   mov   r1, #0x40           \ Enter Self Refresh value
    7292   str   r1, [r0, #0x120]    \ USER_INITIATED_COMMAND0
    73 
     93[then]
     94
     95[ifdef] use-drivers
    7496   ldr   r3, [r0, #0x1e0]    \ PHY_CTRL8
    75    bic   r1, r3, #0x07700000 \ PHY_ADCM_ZPDRV: 0 PHY_ADCM_ZNDRV: 0 (Disable drivers 6:0)
     97   bic   r1, r3, #0x0ff00000 \ PHY_ADCM_ZPDRV: f PHY_ADCM_ZNDRV: f (disable drivers)
    7698   str   r1, [r0, #0x1e0]    \ PHY_CTRL8
     99[then]
    77100
    78101   dsb                       \ Data Synchronization Barrier
    79102   wfi                       \ Wait for interrupt
    80103
    81    str   r3, [r0, #0x1e0]    \ PHY_CTRL8 - restore previous value
    82 
     104[ifdef] use-gpio
     105   mov     r1, 0x8           \ GPIO 3
     106   str     r1, [r4, #0x24]   \ Clr
     107[then]
     108
     109[ifdef] use-drivers
     110   str   r3, [r0, #0x1e0]    \ PHY_CTRL8 - restore previous value  (all drivers)
     111[then]
     112
     113[ifdef] use-delay1
     114   \ Delay to let the memory controller and DRAM DLLs settle
     115   mov   r1, #0x600  begin  decs r1,1  0= until
     116[then]
     117
     118[ifdef] use-phy-dll-reset
    83119   mov   r1, #0x20000000     \ PHY_DLL_RESET
    84120   str   r1, [r0, #0x240]    \ PHY_CTRL14
    85 
     121[then]
     122
     123[ifdef] use-phy-dll-update
    86124   mov   r1, #0x40000000     \ DLL_UPDATE_EN
    87125   str   r1, [r0, #0x240]    \ PHY_CTRL14
    88 
     126[then]
     127
     128[ifdef] use-dram-dll-reset
     129   ldr   r1, [r0, #0x080]    \ PHY_CTRL1
     130   orr   r1, r1, #0x40       \ DLL_RESET
     131   str   r1, [r0, #0x080]    \ PHY_CTRL1
     132   mov   r1, #0x100          \ USER_LMR0_REQ
     133   orr   r1, r1, #0x03000000 \ CHIP_SELECT_0 | CHIP_SELECT_1
     134   str   r1, [r0, #0x120]    \ USER_INITIATED_COMMAND0
     135[then]
     136
     137[ifdef] use-self-refresh
    89138   mov   r1, #0x80           \ Exit Self Refresh value
    90139   str   r1, [r0, #0x120]    \ USER_INITIATED_COMMAND0
    91 
    92 [ifdef] notdef2
     140[then]
     141
     142[ifdef] use-odt
    93143   str   r2, [r0, #0x770]    \ SDRAM_CTRL7_SDRAM_ODT_CTRL2 - restore previous value
    94144[then]
    95145
    96 [ifdef] notdef
     146[ifdef] use-zqcal
    97147   mov   r1, #0x01000000       \ Chip select 0
    98148   orr   r1, r1, #0x00001000   \ Initiate ZQ calibration long
     
    108158[then]
    109159
    110    \ Delay to let the memory controller and DRAM DLLs settle
    111    mov   r1, #0x0300  begin  decs r1,1  0= until
    112 
     160[ifdef] use-gpio
     161   mov     r1, 0x8           \ GPIO 3
     162   str     r1, [r4, #0x18]   \ Set
     163[then]
     164
     165[ifdef] use-delay2
     166   \ Delay to ensure that at least 512 DRAM NOP's happen before the first access
     167   mov   r1, #0x600  begin  decs r1,1  0= until
     168[then]
     169
     170[ifdef] use-delay3
     171   \ Delay to ensure that at least 512 DRAM NOP's happen before the first access
     172   mov   r1, #0x20  begin  decs r1,1  0= until
     173[then]
     174
     175[ifdef] use-gpio
     176   mov     r1, 0x8           \ GPIO 3
     177   str     r1, [r4, #0x24]   \ Clr
     178[then]
     179
     180[ifdef] use-block
    113181   mov     r1, #0x0          \ Unblock data requests
    114182   str     r1, [r0, #0x7e0]  \ SDRAM_CTRL14
     183[then]
    115184
    116185   mov     pc, lr
     
    663732
    664733   h# 0020.0000 or                 ( apcr idle' )  \ PJ_DIS_MC_SW_REQ - disable idle entry using software register bits
     734[ifdef] use-auto-mc-wake
    665735   h# 0010.0000 or                 ( apcr idle' )  \ PJ_MC_WAKE_EN - wake memory controller when core wakes
     736[then]
    666737
    667738   0 h# b0 pmua!                   ( apcr idle )   \ PMUA_MC_HW_SLP_TYPE - self-refresh power down
     
    737808
    738809: str  ( -- )
     810[ifdef] use-gpio
     811   3 gpio-dir-out
     812[then]
     813
    739814   disable-interrupts
    740815   suspend-usb
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