Changeset 913 for trunk/chipset_enable.c
- Timestamp:
- Feb 25, 2010 12:38:23 PM (3 years ago)
- File:
-
- 1 edited
-
trunk/chipset_enable.c (modified) (4 diffs)
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- Unmodified
- Added
- Removed
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trunk/chipset_enable.c
r906 r913 1061 1061 { 1062 1062 int ret = 0; 1063 uint8_t byte;1063 uint8_t val; 1064 1064 uint16_t status; 1065 1065 char *busname; … … 1071 1071 1072 1072 /* dev is the ISA bridge. No idea what the stuff below does. */ 1073 byte= pci_read_byte(dev, 0x8a);1073 val = pci_read_byte(dev, 0x8a); 1074 1074 msg_pdbg("ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 " 1075 "is %i\n", byte, (byte >> 6) & 0x1, (byte>> 5) & 0x1);1076 switch (( byte>> 5) & 0x3) {1075 "is %i\n", val, (val >> 6) & 0x1, (val >> 5) & 0x1); 1076 switch ((val >> 5) & 0x3) { 1077 1077 case 0x0: 1078 1078 buses_supported = CHIP_BUSTYPE_LPC; … … 1091 1091 /* Force enable SPI and disable LPC? Not a good idea. */ 1092 1092 #if 0 1093 byte|= (1 << 6);1094 byte&= ~(1 << 5);1095 pci_write_byte(dev, 0x8a, byte);1093 val |= (1 << 6); 1094 val &= ~(1 << 5); 1095 pci_write_byte(dev, 0x8a, val); 1096 1096 #endif 1097 1097 … … 1225 1225 static int enable_flash_ht1000(struct pci_dev *dev, const char *name) 1226 1226 { 1227 uint8_t byte;1227 uint8_t val; 1228 1228 1229 1229 /* Set the 4MB enable bit. */ 1230 byte= pci_read_byte(dev, 0x41);1231 byte|= 0x0e;1232 pci_write_byte(dev, 0x41, byte);1233 1234 byte= pci_read_byte(dev, 0x43);1235 byte|= (1 << 4);1236 pci_write_byte(dev, 0x43, byte);1230 val = pci_read_byte(dev, 0x41); 1231 val |= 0x0e; 1232 pci_write_byte(dev, 0x41, val); 1233 1234 val = pci_read_byte(dev, 0x43); 1235 val |= (1 << 4); 1236 pci_write_byte(dev, 0x43, val); 1237 1237 1238 1238 return 0;
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