Changeset 1528 for trunk


Ignore:
Timestamp:
May 2, 2012, 10:08:01 PM (3 years ago)
Author:
stefanct
Message:

spi25.c: Refactor spi_write_status_register helpers.

In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register
function was duplicated to send WREN and EWSR commands respectively controlled
by a new common wrapper function spi_write_status_register without a reason.
Both functions' resulting code is equal apart from the opcode used. The code
itself does also differ in the macros used, but their value (apart from the opcode)
is equal. This patch adds a new parameter for the opcode to the helper function
which allows removal of the other one. This relies on the fact that EWSR and WREN
have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the
sizes could be made parameters too.

This patch also changes the wrapper so that it no longer sets the feature bits
of the struct flash(ctx) argument. This may result in changed output, because it
no longer implicitly disables the debug message in following executions. Since
almost all chips had their feature bits fixed in the previous commit, this is
a minor problem.

Also, spi_write_status_enable has been dead code since r658 or so. Remove it.

Signed-off-by: Stefan Tauner <stefan.tauner@…>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/spi25.c

    r1500 r1528  
    765765 * generic that this... 
    766766 */ 
    767 static int spi_write_status_register_ewsr(struct flashctx *flash, int status) 
     767static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode) 
    768768{ 
    769769        int result; 
    770770        int i = 0; 
     771        /* 
     772         * WRSR requires either EWSR or WREN depending on chip type. 
     773         * The code below relies on the fact hat EWSR and WREN have the same 
     774         * INSIZE and OUTSIZE. 
     775         */ 
    771776        struct spi_command cmds[] = { 
    772777        { 
    773         /* WRSR requires either EWSR or WREN depending on chip type. */ 
    774                 .writecnt       = JEDEC_EWSR_OUTSIZE, 
    775                 .writearr       = (const unsigned char[]){ JEDEC_EWSR }, 
     778                .writecnt       = JEDEC_WREN_OUTSIZE, 
     779                .writearr       = (const unsigned char[]){ enable_opcode }, 
    776780                .readcnt        = 0, 
    777781                .readarr        = NULL, 
     
    790794        result = spi_send_multicommand(flash, cmds); 
    791795        if (result) { 
    792                 msg_cerr("%s failed during command execution\n", 
    793                         __func__); 
     796                msg_cerr("%s failed during command execution\n", __func__); 
    794797                /* No point in waiting for the command to complete if execution 
    795798                 * failed. 
     
    813816} 
    814817 
    815 static int spi_write_status_register_wren(struct flashctx *flash, int status) 
    816 { 
    817         int result; 
    818         int i = 0; 
    819         struct spi_command cmds[] = { 
    820         { 
    821         /* WRSR requires either EWSR or WREN depending on chip type. */ 
    822                 .writecnt       = JEDEC_WREN_OUTSIZE, 
    823                 .writearr       = (const unsigned char[]){ JEDEC_WREN }, 
    824                 .readcnt        = 0, 
    825                 .readarr        = NULL, 
    826         }, { 
    827                 .writecnt       = JEDEC_WRSR_OUTSIZE, 
    828                 .writearr       = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status }, 
    829                 .readcnt        = 0, 
    830                 .readarr        = NULL, 
    831         }, { 
    832                 .writecnt       = 0, 
    833                 .writearr       = NULL, 
    834                 .readcnt        = 0, 
    835                 .readarr        = NULL, 
    836         }}; 
    837  
    838         result = spi_send_multicommand(flash, cmds); 
    839         if (result) { 
    840                 msg_cerr("%s failed during command execution\n", 
    841                         __func__); 
    842                 /* No point in waiting for the command to complete if execution 
    843                  * failed. 
    844                  */ 
    845                 return result; 
    846         } 
    847         /* WRSR performs a self-timed erase before the changes take effect. 
    848          * This may take 50-85 ms in most cases, and some chips apparently 
    849          * allow running RDSR only once. Therefore pick an initial delay of 
    850          * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. 
    851          */ 
    852         programmer_delay(100 * 1000); 
    853         while (spi_read_status_register(flash) & JEDEC_RDSR_BIT_WIP) { 
    854                 if (++i > 490) { 
    855                         msg_cerr("Error: WIP bit after WRSR never cleared\n"); 
    856                         return TIMEOUT_ERROR; 
    857                 } 
    858                 programmer_delay(10 * 1000); 
    859         } 
    860         return 0; 
    861 } 
    862  
    863818int spi_write_status_register(struct flashctx *flash, int status) 
    864819{ 
     820        int feature_bits = flash->feature_bits; 
    865821        int ret = 1; 
    866822 
    867         if (!(flash->feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { 
     823        if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) { 
    868824                msg_cdbg("Missing status register write definition, assuming " 
    869825                         "EWSR is needed\n"); 
    870                 flash->feature_bits |= FEATURE_WRSR_EWSR; 
    871         } 
    872         if (flash->feature_bits & FEATURE_WRSR_WREN) 
    873                 ret = spi_write_status_register_wren(flash, status); 
    874         if (ret && (flash->feature_bits & FEATURE_WRSR_EWSR)) 
    875                 ret = spi_write_status_register_ewsr(flash, status); 
     826                feature_bits |= FEATURE_WRSR_EWSR; 
     827        } 
     828        if (feature_bits & FEATURE_WRSR_WREN) 
     829                ret = spi_write_status_register_flag(flash, status, JEDEC_WREN); 
     830        if (ret && (feature_bits & FEATURE_WRSR_EWSR)) 
     831                ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR); 
    876832        return ret; 
    877833} 
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