Changeset 1499 for trunk/board_enable.c


Ignore:
Timestamp:
Feb 16, 2012, 10:07:07 PM (3 years ago)
Author:
stefanct
Message:

Add a bunch of new/tested stuff and various small changes 10

Tested mainboards:
OK:

NOT OK:

Tested flash chips:

Tested chipsets:

  • AMD's SB950 (and presumably also SB920) have the same PCI ID as previous generations, hence change the chipset enable device string. Thanks to Christian Ruppert for the suggestion.
  • Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard graphics card in its pattern. Change this to the LPC controller.
  • Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable wrapper of it (enable_flash_pch6).
  • Fix two paranoid checks for address < 0 in ichspi.c which became futile (and generate clang warnings) with the unsignify patch committed in r1470.
  • Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could be distinguished by an extended RDID probe (Atmel's patented EDI procedure), which we do not support yet, hence handle them as one model for now.
  • Source format fixes and typos

the addition of the ASRock AM2NF6G-VSTA to print.c is
Signed-off-by: Paul Menzel <paulepanter@…>
everything else is
Signed-off-by: Stefan Tauner <stefan.tauner@…>
Acked-by: Stefan Tauner <stefan.tauner@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/board_enable.c

    r1491 r1499  
    15631563 * Suited for: 
    15641564 *  - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ... 
    1565  *    - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1) 
     1565 *    - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1) 
    15661566 */ 
    15671567static int intel_ich_gpio38_raise(void) 
     
    21152115        {0x10de, 0x0050, 0x147b, 0x1c1a,       0,      0,      0,      0, NULL,         NULL, NULL,           P3, "abit",        "KN8 Ultra",             0,   NT, nvidia_mcp_gpio2_lower}, 
    21162116        {0x10de, 0x01e0, 0x147b, 0x1c00,  0x10de, 0x0060, 0x147B, 0x1c00, NULL,         NULL, NULL,           P3, "abit",        "NF7-S",                 0,   OK, nvidia_mcp_gpio8_raise}, 
    2117         {0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0240, 0x10de, 0x0222, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower}, 
     2117        {0x10de, 0x02f0, 0x147b, 0x1c26,  0x10de, 0x0260, 0x147b, 0x1c26, NULL,         NULL, NULL,           P3, "abit",        "NF-M2 nView",           0,   OK, nvidia_mcp_gpio4_lower}, 
    21182118        {0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, "(VA6)$",     NULL, NULL,           P3, "abit",        "VA6",                   0,   OK, via_apollo_gpo4_lower}, 
    21192119        {0x1106, 0x0691,      0,      0,  0x1106, 0x3057,      0,      0, NULL,         "abit", "vt6x4",      P3, "abit",        "VT6X4",                 0,   OK, via_apollo_gpo4_lower}, 
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