| 1 | /* |
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| 2 | * This file is part of the flashrom project. |
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| 3 | * |
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| 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger |
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| 5 | * |
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| 6 | * This program is free software; you can redistribute it and/or modify |
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| 7 | * it under the terms of the GNU General Public License as published by |
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| 8 | * the Free Software Foundation; version 2 of the License. |
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| 9 | * |
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| 10 | * This program is distributed in the hope that it will be useful, |
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| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 13 | * GNU General Public License for more details. |
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| 14 | * |
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| 15 | * You should have received a copy of the GNU General Public License |
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| 16 | * along with this program; if not, write to the Free Software |
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| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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| 18 | */ |
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| 19 | |
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| 20 | #include <string.h> |
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| 21 | #include <stdlib.h> |
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| 22 | #include <stdio.h> |
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| 23 | #include <ctype.h> |
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| 24 | #include <errno.h> |
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| 25 | #include "flash.h" |
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| 26 | #include "chipdrivers.h" |
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| 27 | #include "programmer.h" |
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| 28 | |
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| 29 | /* Remove the #define below if you don't want SPI flash chip emulation. */ |
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| 30 | #define EMULATE_SPI_CHIP 1 |
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| 31 | |
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| 32 | #if EMULATE_SPI_CHIP |
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| 33 | #define EMULATE_CHIP 1 |
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| 34 | #include "spi.h" |
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| 35 | #endif |
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| 36 | |
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| 37 | #if EMULATE_CHIP |
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| 38 | #include <sys/types.h> |
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| 39 | #include <sys/stat.h> |
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| 40 | #endif |
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| 41 | |
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| 42 | #if EMULATE_CHIP |
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| 43 | static uint8_t *flashchip_contents = NULL; |
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| 44 | enum emu_chip { |
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| 45 | EMULATE_NONE, |
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| 46 | EMULATE_ST_M25P10_RES, |
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| 47 | EMULATE_SST_SST25VF040_REMS, |
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| 48 | EMULATE_SST_SST25VF032B, |
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| 49 | EMULATE_MACRONIX_MX25L6436, |
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| 50 | }; |
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| 51 | static enum emu_chip emu_chip = EMULATE_NONE; |
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| 52 | static char *emu_persistent_image = NULL; |
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| 53 | static unsigned int emu_chip_size = 0; |
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| 54 | #if EMULATE_SPI_CHIP |
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| 55 | static unsigned int emu_max_byteprogram_size = 0; |
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| 56 | static unsigned int emu_max_aai_size = 0; |
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| 57 | static unsigned int emu_jedec_se_size = 0; |
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| 58 | static unsigned int emu_jedec_be_52_size = 0; |
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| 59 | static unsigned int emu_jedec_be_d8_size = 0; |
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| 60 | static unsigned int emu_jedec_ce_60_size = 0; |
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| 61 | static unsigned int emu_jedec_ce_c7_size = 0; |
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| 62 | unsigned char spi_blacklist[256]; |
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| 63 | unsigned char spi_ignorelist[256]; |
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| 64 | int spi_blacklist_size = 0; |
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| 65 | int spi_ignorelist_size = 0; |
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| 66 | static uint8_t emu_status = 0; |
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| 67 | |
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| 68 | /* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */ |
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| 69 | static const uint8_t sfdp_table[] = { |
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| 70 | 0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature |
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| 71 | 0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers |
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| 72 | 0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long |
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| 73 | 0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30) |
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| 74 | 0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long |
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| 75 | 0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60) |
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| 76 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole. |
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| 77 | 0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start |
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| 78 | 0xFF, 0xFF, 0xFF, 0x03, // @0x20 |
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| 79 | 0x00, 0xFF, 0x08, 0x6B, // @0x24 |
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| 80 | 0x08, 0x3B, 0x00, 0xFF, // @0x28 |
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| 81 | 0xEE, 0xFF, 0xFF, 0xFF, // @0x2C |
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| 82 | 0xFF, 0xFF, 0x00, 0x00, // @0x30 |
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| 83 | 0xFF, 0xFF, 0x00, 0xFF, // @0x34 |
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| 84 | 0x0C, 0x20, 0x0F, 0x52, // @0x38 |
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| 85 | 0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end |
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| 86 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole. |
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| 87 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole. |
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| 88 | 0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start |
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| 89 | 0xF4, 0x4F, 0xFF, 0xFF, // @0x4C |
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| 90 | 0xD9, 0xC8, 0xFF, 0xFF, // @0x50 |
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| 91 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end |
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| 92 | }; |
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| 93 | |
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| 94 | #endif |
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| 95 | #endif |
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| 96 | |
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| 97 | static unsigned int spi_write_256_chunksize = 256; |
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| 98 | |
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| 99 | static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, |
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| 100 | unsigned int readcnt, |
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| 101 | const unsigned char *writearr, |
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| 102 | unsigned char *readarr); |
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| 103 | static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf, |
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| 104 | unsigned int start, unsigned int len); |
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| 105 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, |
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| 106 | chipaddr addr); |
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| 107 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, |
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| 108 | chipaddr addr); |
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| 109 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, |
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| 110 | chipaddr addr); |
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| 111 | static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, |
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| 112 | chipaddr addr, size_t len); |
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| 113 | static uint8_t dummy_chip_readb(const struct flashctx *flash, |
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| 114 | const chipaddr addr); |
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| 115 | static uint16_t dummy_chip_readw(const struct flashctx *flash, |
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| 116 | const chipaddr addr); |
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| 117 | static uint32_t dummy_chip_readl(const struct flashctx *flash, |
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| 118 | const chipaddr addr); |
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| 119 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, |
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| 120 | const chipaddr addr, size_t len); |
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| 121 | |
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| 122 | static const struct spi_programmer spi_programmer_dummyflasher = { |
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| 123 | .type = SPI_CONTROLLER_DUMMY, |
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| 124 | .max_data_read = MAX_DATA_READ_UNLIMITED, |
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| 125 | .max_data_write = MAX_DATA_UNSPECIFIED, |
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| 126 | .command = dummy_spi_send_command, |
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| 127 | .multicommand = default_spi_send_multicommand, |
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| 128 | .read = default_spi_read, |
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| 129 | .write_256 = dummy_spi_write_256, |
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| 130 | .write_aai = default_spi_write_aai, |
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| 131 | }; |
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| 132 | |
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| 133 | static const struct par_programmer par_programmer_dummy = { |
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| 134 | .chip_readb = dummy_chip_readb, |
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| 135 | .chip_readw = dummy_chip_readw, |
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| 136 | .chip_readl = dummy_chip_readl, |
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| 137 | .chip_readn = dummy_chip_readn, |
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| 138 | .chip_writeb = dummy_chip_writeb, |
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| 139 | .chip_writew = dummy_chip_writew, |
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| 140 | .chip_writel = dummy_chip_writel, |
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| 141 | .chip_writen = dummy_chip_writen, |
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| 142 | }; |
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| 143 | |
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| 144 | enum chipbustype dummy_buses_supported = BUS_NONE; |
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| 145 | |
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| 146 | static int dummy_shutdown(void *data) |
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| 147 | { |
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| 148 | msg_pspew("%s\n", __func__); |
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| 149 | #if EMULATE_CHIP |
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| 150 | if (emu_chip != EMULATE_NONE) { |
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| 151 | if (emu_persistent_image) { |
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| 152 | msg_pdbg("Writing %s\n", emu_persistent_image); |
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| 153 | write_buf_to_file(flashchip_contents, emu_chip_size, emu_persistent_image); |
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| 154 | free(emu_persistent_image); |
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| 155 | emu_persistent_image = NULL; |
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| 156 | } |
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| 157 | free(flashchip_contents); |
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| 158 | } |
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| 159 | #endif |
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| 160 | return 0; |
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| 161 | } |
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| 162 | |
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| 163 | int dummy_init(void) |
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| 164 | { |
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| 165 | char *bustext = NULL; |
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| 166 | char *tmp = NULL; |
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| 167 | int i; |
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| 168 | #if EMULATE_SPI_CHIP |
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| 169 | char *status = NULL; |
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| 170 | #endif |
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| 171 | #if EMULATE_CHIP |
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| 172 | struct stat image_stat; |
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| 173 | #endif |
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| 174 | |
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| 175 | msg_pspew("%s\n", __func__); |
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| 176 | |
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| 177 | bustext = extract_programmer_param("bus"); |
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| 178 | msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default"); |
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| 179 | if (!bustext) |
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| 180 | bustext = strdup("parallel+lpc+fwh+spi"); |
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| 181 | /* Convert the parameters to lowercase. */ |
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| 182 | tolower_string(bustext); |
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| 183 | |
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| 184 | dummy_buses_supported = BUS_NONE; |
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| 185 | if (strstr(bustext, "parallel")) { |
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| 186 | dummy_buses_supported |= BUS_PARALLEL; |
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| 187 | msg_pdbg("Enabling support for %s flash.\n", "parallel"); |
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| 188 | } |
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| 189 | if (strstr(bustext, "lpc")) { |
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| 190 | dummy_buses_supported |= BUS_LPC; |
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| 191 | msg_pdbg("Enabling support for %s flash.\n", "LPC"); |
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| 192 | } |
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| 193 | if (strstr(bustext, "fwh")) { |
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| 194 | dummy_buses_supported |= BUS_FWH; |
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| 195 | msg_pdbg("Enabling support for %s flash.\n", "FWH"); |
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| 196 | } |
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| 197 | if (strstr(bustext, "spi")) { |
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| 198 | dummy_buses_supported |= BUS_SPI; |
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| 199 | msg_pdbg("Enabling support for %s flash.\n", "SPI"); |
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| 200 | } |
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| 201 | if (dummy_buses_supported == BUS_NONE) |
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| 202 | msg_pdbg("Support for all flash bus types disabled.\n"); |
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| 203 | free(bustext); |
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| 204 | |
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| 205 | tmp = extract_programmer_param("spi_write_256_chunksize"); |
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| 206 | if (tmp) { |
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| 207 | spi_write_256_chunksize = atoi(tmp); |
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| 208 | free(tmp); |
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| 209 | if (spi_write_256_chunksize < 1) { |
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| 210 | msg_perr("invalid spi_write_256_chunksize\n"); |
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| 211 | return 1; |
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| 212 | } |
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| 213 | } |
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| 214 | |
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| 215 | tmp = extract_programmer_param("spi_blacklist"); |
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| 216 | if (tmp) { |
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| 217 | i = strlen(tmp); |
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| 218 | if (!strncmp(tmp, "0x", 2)) { |
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| 219 | i -= 2; |
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| 220 | memmove(tmp, tmp + 2, i + 1); |
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| 221 | } |
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| 222 | if ((i > 512) || (i % 2)) { |
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| 223 | msg_perr("Invalid SPI command blacklist length\n"); |
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| 224 | free(tmp); |
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| 225 | return 1; |
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| 226 | } |
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| 227 | spi_blacklist_size = i / 2; |
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| 228 | for (i = 0; i < spi_blacklist_size * 2; i++) { |
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| 229 | if (!isxdigit((unsigned char)tmp[i])) { |
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| 230 | msg_perr("Invalid char \"%c\" in SPI command " |
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| 231 | "blacklist\n", tmp[i]); |
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| 232 | free(tmp); |
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| 233 | return 1; |
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| 234 | } |
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| 235 | } |
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| 236 | for (i = 0; i < spi_blacklist_size; i++) { |
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| 237 | unsigned int tmp2; |
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| 238 | /* SCNx8 is apparently not supported by MSVC (and thus |
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| 239 | * MinGW), so work around it with an extra variable |
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| 240 | */ |
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| 241 | sscanf(tmp + i * 2, "%2x", &tmp2); |
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| 242 | spi_blacklist[i] = (uint8_t)tmp2; |
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| 243 | } |
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| 244 | msg_pdbg("SPI blacklist is "); |
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| 245 | for (i = 0; i < spi_blacklist_size; i++) |
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| 246 | msg_pdbg("%02x ", spi_blacklist[i]); |
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| 247 | msg_pdbg(", size %i\n", spi_blacklist_size); |
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| 248 | } |
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| 249 | free(tmp); |
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| 250 | |
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| 251 | tmp = extract_programmer_param("spi_ignorelist"); |
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| 252 | if (tmp) { |
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| 253 | i = strlen(tmp); |
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| 254 | if (!strncmp(tmp, "0x", 2)) { |
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| 255 | i -= 2; |
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| 256 | memmove(tmp, tmp + 2, i + 1); |
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| 257 | } |
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| 258 | if ((i > 512) || (i % 2)) { |
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| 259 | msg_perr("Invalid SPI command ignorelist length\n"); |
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| 260 | free(tmp); |
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| 261 | return 1; |
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| 262 | } |
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| 263 | spi_ignorelist_size = i / 2; |
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| 264 | for (i = 0; i < spi_ignorelist_size * 2; i++) { |
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| 265 | if (!isxdigit((unsigned char)tmp[i])) { |
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| 266 | msg_perr("Invalid char \"%c\" in SPI command " |
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| 267 | "ignorelist\n", tmp[i]); |
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| 268 | free(tmp); |
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| 269 | return 1; |
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| 270 | } |
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| 271 | } |
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| 272 | for (i = 0; i < spi_ignorelist_size; i++) { |
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| 273 | unsigned int tmp2; |
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| 274 | /* SCNx8 is apparently not supported by MSVC (and thus |
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| 275 | * MinGW), so work around it with an extra variable |
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| 276 | */ |
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| 277 | sscanf(tmp + i * 2, "%2x", &tmp2); |
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| 278 | spi_ignorelist[i] = (uint8_t)tmp2; |
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| 279 | } |
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| 280 | msg_pdbg("SPI ignorelist is "); |
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| 281 | for (i = 0; i < spi_ignorelist_size; i++) |
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| 282 | msg_pdbg("%02x ", spi_ignorelist[i]); |
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| 283 | msg_pdbg(", size %i\n", spi_ignorelist_size); |
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| 284 | } |
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| 285 | free(tmp); |
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| 286 | |
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| 287 | #if EMULATE_CHIP |
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| 288 | tmp = extract_programmer_param("emulate"); |
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| 289 | if (!tmp) { |
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| 290 | msg_pdbg("Not emulating any flash chip.\n"); |
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| 291 | /* Nothing else to do. */ |
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| 292 | goto dummy_init_out; |
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| 293 | } |
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| 294 | #if EMULATE_SPI_CHIP |
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| 295 | if (!strcmp(tmp, "M25P10.RES")) { |
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| 296 | emu_chip = EMULATE_ST_M25P10_RES; |
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| 297 | emu_chip_size = 128 * 1024; |
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| 298 | emu_max_byteprogram_size = 128; |
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| 299 | emu_max_aai_size = 0; |
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| 300 | emu_jedec_se_size = 0; |
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| 301 | emu_jedec_be_52_size = 0; |
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| 302 | emu_jedec_be_d8_size = 32 * 1024; |
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| 303 | emu_jedec_ce_60_size = 0; |
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| 304 | emu_jedec_ce_c7_size = emu_chip_size; |
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| 305 | msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page " |
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| 306 | "write)\n"); |
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| 307 | } |
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| 308 | if (!strcmp(tmp, "SST25VF040.REMS")) { |
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| 309 | emu_chip = EMULATE_SST_SST25VF040_REMS; |
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| 310 | emu_chip_size = 512 * 1024; |
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| 311 | emu_max_byteprogram_size = 1; |
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| 312 | emu_max_aai_size = 0; |
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| 313 | emu_jedec_se_size = 4 * 1024; |
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| 314 | emu_jedec_be_52_size = 32 * 1024; |
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| 315 | emu_jedec_be_d8_size = 0; |
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| 316 | emu_jedec_ce_60_size = emu_chip_size; |
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| 317 | emu_jedec_ce_c7_size = 0; |
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| 318 | msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, " |
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| 319 | "byte write)\n"); |
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| 320 | } |
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| 321 | if (!strcmp(tmp, "SST25VF032B")) { |
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| 322 | emu_chip = EMULATE_SST_SST25VF032B; |
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| 323 | emu_chip_size = 4 * 1024 * 1024; |
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| 324 | emu_max_byteprogram_size = 1; |
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| 325 | emu_max_aai_size = 2; |
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| 326 | emu_jedec_se_size = 4 * 1024; |
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| 327 | emu_jedec_be_52_size = 32 * 1024; |
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| 328 | emu_jedec_be_d8_size = 64 * 1024; |
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| 329 | emu_jedec_ce_60_size = emu_chip_size; |
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| 330 | emu_jedec_ce_c7_size = emu_chip_size; |
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| 331 | msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI " |
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| 332 | "write)\n"); |
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| 333 | } |
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| 334 | if (!strcmp(tmp, "MX25L6436")) { |
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| 335 | emu_chip = EMULATE_MACRONIX_MX25L6436; |
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| 336 | emu_chip_size = 8 * 1024 * 1024; |
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| 337 | emu_max_byteprogram_size = 256; |
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| 338 | emu_max_aai_size = 0; |
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| 339 | emu_jedec_se_size = 4 * 1024; |
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| 340 | emu_jedec_be_52_size = 32 * 1024; |
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| 341 | emu_jedec_be_d8_size = 64 * 1024; |
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| 342 | emu_jedec_ce_60_size = emu_chip_size; |
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| 343 | emu_jedec_ce_c7_size = emu_chip_size; |
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| 344 | msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, " |
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| 345 | "SFDP)\n"); |
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| 346 | } |
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| 347 | #endif |
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| 348 | if (emu_chip == EMULATE_NONE) { |
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| 349 | msg_perr("Invalid chip specified for emulation: %s\n", tmp); |
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| 350 | free(tmp); |
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| 351 | return 1; |
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| 352 | } |
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| 353 | free(tmp); |
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| 354 | flashchip_contents = malloc(emu_chip_size); |
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| 355 | if (!flashchip_contents) { |
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| 356 | msg_perr("Out of memory!\n"); |
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| 357 | return 1; |
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| 358 | } |
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| 359 | |
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| 360 | #ifdef EMULATE_SPI_CHIP |
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| 361 | status = extract_programmer_param("spi_status"); |
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| 362 | if (status) { |
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| 363 | char *endptr; |
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| 364 | errno = 0; |
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| 365 | emu_status = strtoul(status, &endptr, 0); |
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| 366 | free(status); |
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| 367 | if (errno != 0 || status == endptr) { |
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| 368 | msg_perr("Error: initial status register specified, " |
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| 369 | "but the value could not be converted.\n"); |
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| 370 | return 1; |
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| 371 | } |
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| 372 | msg_pdbg("Initial status register is set to 0x%02x.\n", |
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| 373 | emu_status); |
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| 374 | } |
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| 375 | #endif |
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| 376 | |
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| 377 | msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size); |
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| 378 | memset(flashchip_contents, 0xff, emu_chip_size); |
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| 379 | |
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| 380 | emu_persistent_image = extract_programmer_param("image"); |
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| 381 | if (!emu_persistent_image) { |
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| 382 | /* Nothing else to do. */ |
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| 383 | goto dummy_init_out; |
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| 384 | } |
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| 385 | if (!stat(emu_persistent_image, &image_stat)) { |
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| 386 | msg_pdbg("Found persistent image %s, size %li ", |
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| 387 | emu_persistent_image, (long)image_stat.st_size); |
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| 388 | if (image_stat.st_size == emu_chip_size) { |
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| 389 | msg_pdbg("matches.\n"); |
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| 390 | msg_pdbg("Reading %s\n", emu_persistent_image); |
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| 391 | read_buf_from_file(flashchip_contents, emu_chip_size, |
|---|
| 392 | emu_persistent_image); |
|---|
| 393 | } else { |
|---|
| 394 | msg_pdbg("doesn't match.\n"); |
|---|
| 395 | } |
|---|
| 396 | } |
|---|
| 397 | #endif |
|---|
| 398 | |
|---|
| 399 | dummy_init_out: |
|---|
| 400 | if (register_shutdown(dummy_shutdown, NULL)) { |
|---|
| 401 | free(flashchip_contents); |
|---|
| 402 | return 1; |
|---|
| 403 | } |
|---|
| 404 | if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH)) |
|---|
| 405 | register_par_programmer(&par_programmer_dummy, |
|---|
| 406 | dummy_buses_supported & |
|---|
| 407 | (BUS_PARALLEL | BUS_LPC | |
|---|
| 408 | BUS_FWH)); |
|---|
| 409 | if (dummy_buses_supported & BUS_SPI) |
|---|
| 410 | register_spi_programmer(&spi_programmer_dummyflasher); |
|---|
| 411 | |
|---|
| 412 | return 0; |
|---|
| 413 | } |
|---|
| 414 | |
|---|
| 415 | void *dummy_map(const char *descr, unsigned long phys_addr, size_t len) |
|---|
| 416 | { |
|---|
| 417 | msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n", |
|---|
| 418 | __func__, descr, (unsigned long)len, phys_addr); |
|---|
| 419 | return (void *)phys_addr; |
|---|
| 420 | } |
|---|
| 421 | |
|---|
| 422 | void dummy_unmap(void *virt_addr, size_t len) |
|---|
| 423 | { |
|---|
| 424 | msg_pspew("%s: Unmapping 0x%lx bytes at %p\n", |
|---|
| 425 | __func__, (unsigned long)len, virt_addr); |
|---|
| 426 | } |
|---|
| 427 | |
|---|
| 428 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, |
|---|
| 429 | chipaddr addr) |
|---|
| 430 | { |
|---|
| 431 | msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val); |
|---|
| 432 | } |
|---|
| 433 | |
|---|
| 434 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, |
|---|
| 435 | chipaddr addr) |
|---|
| 436 | { |
|---|
| 437 | msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val); |
|---|
| 438 | } |
|---|
| 439 | |
|---|
| 440 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, |
|---|
| 441 | chipaddr addr) |
|---|
| 442 | { |
|---|
| 443 | msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val); |
|---|
| 444 | } |
|---|
| 445 | |
|---|
| 446 | static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf, |
|---|
| 447 | chipaddr addr, size_t len) |
|---|
| 448 | { |
|---|
| 449 | size_t i; |
|---|
| 450 | msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):", |
|---|
| 451 | __func__, addr, (unsigned long)len); |
|---|
| 452 | for (i = 0; i < len; i++) { |
|---|
| 453 | if ((i % 16) == 0) |
|---|
| 454 | msg_pspew("\n"); |
|---|
| 455 | msg_pspew("%02x ", buf[i]); |
|---|
| 456 | } |
|---|
| 457 | } |
|---|
| 458 | |
|---|
| 459 | static uint8_t dummy_chip_readb(const struct flashctx *flash, |
|---|
| 460 | const chipaddr addr) |
|---|
| 461 | { |
|---|
| 462 | msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr); |
|---|
| 463 | return 0xff; |
|---|
| 464 | } |
|---|
| 465 | |
|---|
| 466 | static uint16_t dummy_chip_readw(const struct flashctx *flash, |
|---|
| 467 | const chipaddr addr) |
|---|
| 468 | { |
|---|
| 469 | msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr); |
|---|
| 470 | return 0xffff; |
|---|
| 471 | } |
|---|
| 472 | |
|---|
| 473 | static uint32_t dummy_chip_readl(const struct flashctx *flash, |
|---|
| 474 | const chipaddr addr) |
|---|
| 475 | { |
|---|
| 476 | msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr); |
|---|
| 477 | return 0xffffffff; |
|---|
| 478 | } |
|---|
| 479 | |
|---|
| 480 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, |
|---|
| 481 | const chipaddr addr, size_t len) |
|---|
| 482 | { |
|---|
| 483 | msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n", |
|---|
| 484 | __func__, addr, (unsigned long)len); |
|---|
| 485 | memset(buf, 0xff, len); |
|---|
| 486 | return; |
|---|
| 487 | } |
|---|
| 488 | |
|---|
| 489 | #if EMULATE_SPI_CHIP |
|---|
| 490 | static int emulate_spi_chip_response(unsigned int writecnt, |
|---|
| 491 | unsigned int readcnt, |
|---|
| 492 | const unsigned char *writearr, |
|---|
| 493 | unsigned char *readarr) |
|---|
| 494 | { |
|---|
| 495 | unsigned int offs, i, toread; |
|---|
| 496 | static int unsigned aai_offs; |
|---|
| 497 | const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; |
|---|
| 498 | const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; |
|---|
| 499 | const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; |
|---|
| 500 | |
|---|
| 501 | if (writecnt == 0) { |
|---|
| 502 | msg_perr("No command sent to the chip!\n"); |
|---|
| 503 | return 1; |
|---|
| 504 | } |
|---|
| 505 | /* spi_blacklist has precedence over spi_ignorelist. */ |
|---|
| 506 | for (i = 0; i < spi_blacklist_size; i++) { |
|---|
| 507 | if (writearr[0] == spi_blacklist[i]) { |
|---|
| 508 | msg_pdbg("Refusing blacklisted SPI command 0x%02x\n", |
|---|
| 509 | spi_blacklist[i]); |
|---|
| 510 | return SPI_INVALID_OPCODE; |
|---|
| 511 | } |
|---|
| 512 | } |
|---|
| 513 | for (i = 0; i < spi_ignorelist_size; i++) { |
|---|
| 514 | if (writearr[0] == spi_ignorelist[i]) { |
|---|
| 515 | msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n", |
|---|
| 516 | spi_ignorelist[i]); |
|---|
| 517 | /* Return success because the command does not fail, |
|---|
| 518 | * it is simply ignored. |
|---|
| 519 | */ |
|---|
| 520 | return 0; |
|---|
| 521 | } |
|---|
| 522 | } |
|---|
| 523 | |
|---|
| 524 | if (emu_max_aai_size && (emu_status & SPI_SR_AAI)) { |
|---|
| 525 | if (writearr[0] != JEDEC_AAI_WORD_PROGRAM && |
|---|
| 526 | writearr[0] != JEDEC_WRDI && |
|---|
| 527 | writearr[0] != JEDEC_RDSR) { |
|---|
| 528 | msg_perr("Forbidden opcode (0x%02x) attempted during " |
|---|
| 529 | "AAI sequence!\n", writearr[0]); |
|---|
| 530 | return 0; |
|---|
| 531 | } |
|---|
| 532 | } |
|---|
| 533 | |
|---|
| 534 | switch (writearr[0]) { |
|---|
| 535 | case JEDEC_RES: |
|---|
| 536 | if (writecnt < JEDEC_RES_OUTSIZE) |
|---|
| 537 | break; |
|---|
| 538 | /* offs calculation is only needed for SST chips which treat RES like REMS. */ |
|---|
| 539 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 540 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
|---|
| 541 | switch (emu_chip) { |
|---|
| 542 | case EMULATE_ST_M25P10_RES: |
|---|
| 543 | if (readcnt > 0) |
|---|
| 544 | memset(readarr, 0x10, readcnt); |
|---|
| 545 | break; |
|---|
| 546 | case EMULATE_SST_SST25VF040_REMS: |
|---|
| 547 | for (i = 0; i < readcnt; i++) |
|---|
| 548 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
|---|
| 549 | break; |
|---|
| 550 | case EMULATE_SST_SST25VF032B: |
|---|
| 551 | for (i = 0; i < readcnt; i++) |
|---|
| 552 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
|---|
| 553 | break; |
|---|
| 554 | case EMULATE_MACRONIX_MX25L6436: |
|---|
| 555 | if (readcnt > 0) |
|---|
| 556 | memset(readarr, 0x16, readcnt); |
|---|
| 557 | break; |
|---|
| 558 | default: /* ignore */ |
|---|
| 559 | break; |
|---|
| 560 | } |
|---|
| 561 | break; |
|---|
| 562 | case JEDEC_REMS: |
|---|
| 563 | /* REMS response has wraparound and uses an address parameter. */ |
|---|
| 564 | if (writecnt < JEDEC_REMS_OUTSIZE) |
|---|
| 565 | break; |
|---|
| 566 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 567 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
|---|
| 568 | switch (emu_chip) { |
|---|
| 569 | case EMULATE_SST_SST25VF040_REMS: |
|---|
| 570 | for (i = 0; i < readcnt; i++) |
|---|
| 571 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
|---|
| 572 | break; |
|---|
| 573 | case EMULATE_SST_SST25VF032B: |
|---|
| 574 | for (i = 0; i < readcnt; i++) |
|---|
| 575 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
|---|
| 576 | break; |
|---|
| 577 | case EMULATE_MACRONIX_MX25L6436: |
|---|
| 578 | for (i = 0; i < readcnt; i++) |
|---|
| 579 | readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; |
|---|
| 580 | break; |
|---|
| 581 | default: /* ignore */ |
|---|
| 582 | break; |
|---|
| 583 | } |
|---|
| 584 | break; |
|---|
| 585 | case JEDEC_RDID: |
|---|
| 586 | switch (emu_chip) { |
|---|
| 587 | case EMULATE_SST_SST25VF032B: |
|---|
| 588 | if (readcnt > 0) |
|---|
| 589 | readarr[0] = 0xbf; |
|---|
| 590 | if (readcnt > 1) |
|---|
| 591 | readarr[1] = 0x25; |
|---|
| 592 | if (readcnt > 2) |
|---|
| 593 | readarr[2] = 0x4a; |
|---|
| 594 | break; |
|---|
| 595 | case EMULATE_MACRONIX_MX25L6436: |
|---|
| 596 | if (readcnt > 0) |
|---|
| 597 | readarr[0] = 0xc2; |
|---|
| 598 | if (readcnt > 1) |
|---|
| 599 | readarr[1] = 0x20; |
|---|
| 600 | if (readcnt > 2) |
|---|
| 601 | readarr[2] = 0x17; |
|---|
| 602 | break; |
|---|
| 603 | default: /* ignore */ |
|---|
| 604 | break; |
|---|
| 605 | } |
|---|
| 606 | break; |
|---|
| 607 | case JEDEC_RDSR: |
|---|
| 608 | memset(readarr, emu_status, readcnt); |
|---|
| 609 | break; |
|---|
| 610 | /* FIXME: this should be chip-specific. */ |
|---|
| 611 | case JEDEC_EWSR: |
|---|
| 612 | case JEDEC_WREN: |
|---|
| 613 | emu_status |= SPI_SR_WEL; |
|---|
| 614 | break; |
|---|
| 615 | case JEDEC_WRSR: |
|---|
| 616 | if (!(emu_status & SPI_SR_WEL)) { |
|---|
| 617 | msg_perr("WRSR attempted, but WEL is 0!\n"); |
|---|
| 618 | break; |
|---|
| 619 | } |
|---|
| 620 | /* FIXME: add some reasonable simulation of the busy flag */ |
|---|
| 621 | emu_status = writearr[1] & ~SPI_SR_WIP; |
|---|
| 622 | msg_pdbg2("WRSR wrote 0x%02x.\n", emu_status); |
|---|
| 623 | break; |
|---|
| 624 | case JEDEC_READ: |
|---|
| 625 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 626 | /* Truncate to emu_chip_size. */ |
|---|
| 627 | offs %= emu_chip_size; |
|---|
| 628 | if (readcnt > 0) |
|---|
| 629 | memcpy(readarr, flashchip_contents + offs, readcnt); |
|---|
| 630 | break; |
|---|
| 631 | case JEDEC_BYTE_PROGRAM: |
|---|
| 632 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 633 | /* Truncate to emu_chip_size. */ |
|---|
| 634 | offs %= emu_chip_size; |
|---|
| 635 | if (writecnt < 5) { |
|---|
| 636 | msg_perr("BYTE PROGRAM size too short!\n"); |
|---|
| 637 | return 1; |
|---|
| 638 | } |
|---|
| 639 | if (writecnt - 4 > emu_max_byteprogram_size) { |
|---|
| 640 | msg_perr("Max BYTE PROGRAM size exceeded!\n"); |
|---|
| 641 | return 1; |
|---|
| 642 | } |
|---|
| 643 | memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4); |
|---|
| 644 | break; |
|---|
| 645 | case JEDEC_AAI_WORD_PROGRAM: |
|---|
| 646 | if (!emu_max_aai_size) |
|---|
| 647 | break; |
|---|
| 648 | if (!(emu_status & SPI_SR_AAI)) { |
|---|
| 649 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
|---|
| 650 | msg_perr("Initial AAI WORD PROGRAM size too " |
|---|
| 651 | "short!\n"); |
|---|
| 652 | return 1; |
|---|
| 653 | } |
|---|
| 654 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
|---|
| 655 | msg_perr("Initial AAI WORD PROGRAM size too " |
|---|
| 656 | "long!\n"); |
|---|
| 657 | return 1; |
|---|
| 658 | } |
|---|
| 659 | emu_status |= SPI_SR_AAI; |
|---|
| 660 | aai_offs = writearr[1] << 16 | writearr[2] << 8 | |
|---|
| 661 | writearr[3]; |
|---|
| 662 | /* Truncate to emu_chip_size. */ |
|---|
| 663 | aai_offs %= emu_chip_size; |
|---|
| 664 | memcpy(flashchip_contents + aai_offs, writearr + 4, 2); |
|---|
| 665 | aai_offs += 2; |
|---|
| 666 | } else { |
|---|
| 667 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
|---|
| 668 | msg_perr("Continuation AAI WORD PROGRAM size " |
|---|
| 669 | "too short!\n"); |
|---|
| 670 | return 1; |
|---|
| 671 | } |
|---|
| 672 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
|---|
| 673 | msg_perr("Continuation AAI WORD PROGRAM size " |
|---|
| 674 | "too long!\n"); |
|---|
| 675 | return 1; |
|---|
| 676 | } |
|---|
| 677 | memcpy(flashchip_contents + aai_offs, writearr + 1, 2); |
|---|
| 678 | aai_offs += 2; |
|---|
| 679 | } |
|---|
| 680 | break; |
|---|
| 681 | case JEDEC_WRDI: |
|---|
| 682 | if (emu_max_aai_size) |
|---|
| 683 | emu_status &= ~SPI_SR_AAI; |
|---|
| 684 | break; |
|---|
| 685 | case JEDEC_SE: |
|---|
| 686 | if (!emu_jedec_se_size) |
|---|
| 687 | break; |
|---|
| 688 | if (writecnt != JEDEC_SE_OUTSIZE) { |
|---|
| 689 | msg_perr("SECTOR ERASE 0x20 outsize invalid!\n"); |
|---|
| 690 | return 1; |
|---|
| 691 | } |
|---|
| 692 | if (readcnt != JEDEC_SE_INSIZE) { |
|---|
| 693 | msg_perr("SECTOR ERASE 0x20 insize invalid!\n"); |
|---|
| 694 | return 1; |
|---|
| 695 | } |
|---|
| 696 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 697 | if (offs & (emu_jedec_se_size - 1)) |
|---|
| 698 | msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs); |
|---|
| 699 | offs &= ~(emu_jedec_se_size - 1); |
|---|
| 700 | memset(flashchip_contents + offs, 0xff, emu_jedec_se_size); |
|---|
| 701 | break; |
|---|
| 702 | case JEDEC_BE_52: |
|---|
| 703 | if (!emu_jedec_be_52_size) |
|---|
| 704 | break; |
|---|
| 705 | if (writecnt != JEDEC_BE_52_OUTSIZE) { |
|---|
| 706 | msg_perr("BLOCK ERASE 0x52 outsize invalid!\n"); |
|---|
| 707 | return 1; |
|---|
| 708 | } |
|---|
| 709 | if (readcnt != JEDEC_BE_52_INSIZE) { |
|---|
| 710 | msg_perr("BLOCK ERASE 0x52 insize invalid!\n"); |
|---|
| 711 | return 1; |
|---|
| 712 | } |
|---|
| 713 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 714 | if (offs & (emu_jedec_be_52_size - 1)) |
|---|
| 715 | msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs); |
|---|
| 716 | offs &= ~(emu_jedec_be_52_size - 1); |
|---|
| 717 | memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size); |
|---|
| 718 | break; |
|---|
| 719 | case JEDEC_BE_D8: |
|---|
| 720 | if (!emu_jedec_be_d8_size) |
|---|
| 721 | break; |
|---|
| 722 | if (writecnt != JEDEC_BE_D8_OUTSIZE) { |
|---|
| 723 | msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n"); |
|---|
| 724 | return 1; |
|---|
| 725 | } |
|---|
| 726 | if (readcnt != JEDEC_BE_D8_INSIZE) { |
|---|
| 727 | msg_perr("BLOCK ERASE 0xd8 insize invalid!\n"); |
|---|
| 728 | return 1; |
|---|
| 729 | } |
|---|
| 730 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 731 | if (offs & (emu_jedec_be_d8_size - 1)) |
|---|
| 732 | msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs); |
|---|
| 733 | offs &= ~(emu_jedec_be_d8_size - 1); |
|---|
| 734 | memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size); |
|---|
| 735 | break; |
|---|
| 736 | case JEDEC_CE_60: |
|---|
| 737 | if (!emu_jedec_ce_60_size) |
|---|
| 738 | break; |
|---|
| 739 | if (writecnt != JEDEC_CE_60_OUTSIZE) { |
|---|
| 740 | msg_perr("CHIP ERASE 0x60 outsize invalid!\n"); |
|---|
| 741 | return 1; |
|---|
| 742 | } |
|---|
| 743 | if (readcnt != JEDEC_CE_60_INSIZE) { |
|---|
| 744 | msg_perr("CHIP ERASE 0x60 insize invalid!\n"); |
|---|
| 745 | return 1; |
|---|
| 746 | } |
|---|
| 747 | /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */ |
|---|
| 748 | /* emu_jedec_ce_60_size is emu_chip_size. */ |
|---|
| 749 | memset(flashchip_contents, 0xff, emu_jedec_ce_60_size); |
|---|
| 750 | break; |
|---|
| 751 | case JEDEC_CE_C7: |
|---|
| 752 | if (!emu_jedec_ce_c7_size) |
|---|
| 753 | break; |
|---|
| 754 | if (writecnt != JEDEC_CE_C7_OUTSIZE) { |
|---|
| 755 | msg_perr("CHIP ERASE 0xc7 outsize invalid!\n"); |
|---|
| 756 | return 1; |
|---|
| 757 | } |
|---|
| 758 | if (readcnt != JEDEC_CE_C7_INSIZE) { |
|---|
| 759 | msg_perr("CHIP ERASE 0xc7 insize invalid!\n"); |
|---|
| 760 | return 1; |
|---|
| 761 | } |
|---|
| 762 | /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */ |
|---|
| 763 | /* emu_jedec_ce_c7_size is emu_chip_size. */ |
|---|
| 764 | memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size); |
|---|
| 765 | break; |
|---|
| 766 | case JEDEC_SFDP: |
|---|
| 767 | if (emu_chip != EMULATE_MACRONIX_MX25L6436) |
|---|
| 768 | break; |
|---|
| 769 | if (writecnt < 4) |
|---|
| 770 | break; |
|---|
| 771 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
|---|
| 772 | |
|---|
| 773 | /* SFDP expects one dummy byte after the address. */ |
|---|
| 774 | if (writecnt == 4) { |
|---|
| 775 | /* The dummy byte was not written, make sure it is read instead. |
|---|
| 776 | * Shifting and shortening the read array does achieve this goal. |
|---|
| 777 | */ |
|---|
| 778 | readarr++; |
|---|
| 779 | readcnt--; |
|---|
| 780 | } else { |
|---|
| 781 | /* The response is shifted if more than 5 bytes are written, because SFDP data is |
|---|
| 782 | * already shifted out by the chip while those superfluous bytes are written. */ |
|---|
| 783 | offs += writecnt - 5; |
|---|
| 784 | } |
|---|
| 785 | |
|---|
| 786 | /* The SFDP spec implies that the start address of an SFDP read may be truncated to fit in the |
|---|
| 787 | * SFDP table address space, i.e. the start address may be wrapped around at SFDP table size. |
|---|
| 788 | * This is a reasonable implementation choice in hardware because it saves a few gates. */ |
|---|
| 789 | if (offs >= sizeof(sfdp_table)) { |
|---|
| 790 | msg_pdbg("Wrapping the start address around the SFDP table boundary (using 0x%x " |
|---|
| 791 | "instead of 0x%x).\n", (unsigned int)(offs % sizeof(sfdp_table)), offs); |
|---|
| 792 | offs %= sizeof(sfdp_table); |
|---|
| 793 | } |
|---|
| 794 | toread = min(sizeof(sfdp_table) - offs, readcnt); |
|---|
| 795 | memcpy(readarr, sfdp_table + offs, toread); |
|---|
| 796 | if (toread < readcnt) |
|---|
| 797 | msg_pdbg("Crossing the SFDP table boundary in a single " |
|---|
| 798 | "continuous chunk produces undefined results " |
|---|
| 799 | "after that point.\n"); |
|---|
| 800 | break; |
|---|
| 801 | default: |
|---|
| 802 | /* No special response. */ |
|---|
| 803 | break; |
|---|
| 804 | } |
|---|
| 805 | if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR) |
|---|
| 806 | emu_status &= ~SPI_SR_WEL; |
|---|
| 807 | return 0; |
|---|
| 808 | } |
|---|
| 809 | #endif |
|---|
| 810 | |
|---|
| 811 | static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt, |
|---|
| 812 | unsigned int readcnt, |
|---|
| 813 | const unsigned char *writearr, |
|---|
| 814 | unsigned char *readarr) |
|---|
| 815 | { |
|---|
| 816 | int i; |
|---|
| 817 | |
|---|
| 818 | msg_pspew("%s:", __func__); |
|---|
| 819 | |
|---|
| 820 | msg_pspew(" writing %u bytes:", writecnt); |
|---|
| 821 | for (i = 0; i < writecnt; i++) |
|---|
| 822 | msg_pspew(" 0x%02x", writearr[i]); |
|---|
| 823 | |
|---|
| 824 | /* Response for unknown commands and missing chip is 0xff. */ |
|---|
| 825 | memset(readarr, 0xff, readcnt); |
|---|
| 826 | #if EMULATE_SPI_CHIP |
|---|
| 827 | switch (emu_chip) { |
|---|
| 828 | case EMULATE_ST_M25P10_RES: |
|---|
| 829 | case EMULATE_SST_SST25VF040_REMS: |
|---|
| 830 | case EMULATE_SST_SST25VF032B: |
|---|
| 831 | case EMULATE_MACRONIX_MX25L6436: |
|---|
| 832 | if (emulate_spi_chip_response(writecnt, readcnt, writearr, |
|---|
| 833 | readarr)) { |
|---|
| 834 | msg_pdbg("Invalid command sent to flash chip!\n"); |
|---|
| 835 | return 1; |
|---|
| 836 | } |
|---|
| 837 | break; |
|---|
| 838 | default: |
|---|
| 839 | break; |
|---|
| 840 | } |
|---|
| 841 | #endif |
|---|
| 842 | msg_pspew(" reading %u bytes:", readcnt); |
|---|
| 843 | for (i = 0; i < readcnt; i++) |
|---|
| 844 | msg_pspew(" 0x%02x", readarr[i]); |
|---|
| 845 | msg_pspew("\n"); |
|---|
| 846 | return 0; |
|---|
| 847 | } |
|---|
| 848 | |
|---|
| 849 | static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf, |
|---|
| 850 | unsigned int start, unsigned int len) |
|---|
| 851 | { |
|---|
| 852 | return spi_write_chunked(flash, buf, start, len, |
|---|
| 853 | spi_write_256_chunksize); |
|---|
| 854 | } |
|---|