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Opened 6 years ago

Last modified 5 years ago

#129 new defect

etherboot payload does not work with HIGH_TABLES

Reported by: oxygene Owned by: stepan
Priority: critical Milestone:
Component: coreboot Keywords:
Cc: Dependencies:
Patch Status: there is no patch

Description

Without tables in high memory, seabios won't run on your chipset properly. it overwrites your tables in the F segment, as seabios itself lives there.

Also, once there is support for high_tables_base everywhere, the code in src/arch/i386/boot/tables.c can be cleaned up and simplified considerably.

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Change History (3)

comment:1 Changed 6 years ago by stepan

  • Owner changed from somebody to stepan

All chipsets have support code for high tables now, but they're not all tested (and working?) yet.

comment:2 Changed 6 years ago by bam <mybigspam@…>

If I have CONFIG_HAVE_HIGH_TABLES = 1 (or CONFIG_WRITE_HIGH_TABLES=1), etherboot payload can't work:

High Tables Base is 3ff0000.
Moving GDT to 0x3ff0000...ok
Writing high table forward entry at 0x00000500
Wrote coreboot table at: 00000500 - 00000518  checksum f7df
New low_table_end: 0x00000518
Now going to write high coreboot table at 0x03ff0400
rom_table_end = 0x03ff0400
Adjust low_table_end from 0x00000518 to 0x00001000
Adjust rom_table_end from 0x03ff0400 to 0x04000000
Adding high table area
Wrote coreboot table at: 03ff0400 - 03ff0a34  checksum 169b
Check fallback/coreboot_ram
Check fallback/payload
Got a payload
Loading segment from rom address 0xfffc61f8
  data (compression=1)
  New segment dstaddr 0x10000 memsize 0xab80 srcaddr 0xfffc6230 filesize 0x44c0
  (cleaned up) New segment addr 0x10000 size 0xab80 offset 0xfffc6230 filesize 0x44c0
Loading segment from rom address 0xfffc6214
  Entry Point 0x000100b0
Loading Segment: addr: 0x0000000000010000 memsz: 0x000000000000ab80 filesz: 0x00000000000044c0
Post relocation: addr: 0x0000000000010000 memsz: 0x000000000000ab80 filesz: 0x00000000000044c0
using LZMA
Clearing Segment: addr: 0x0000000000014690 memsz: 0x00000000000064f0
dest 10000, end 1ab80, bouncebuffer 3fbc000
Jumping to boot code at 100b0
CPU 1345 Mhz
Etherboot 5.4.4 (GPL) http://etherboot.org
Drivers: VIA 86C100   Images: ELF
Protocols: BOOTP NFS
init_heap: No heap found.

..and halts.
Tested on qemu and epia-m.

comment:3 Changed 5 years ago by stepan

  • Summary changed from Add support for high_tables_base for all chipsets that don't support it yet. to etherboot payload does not work with HIGH_TABLES

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