Changeset 5203


Ignore:
Timestamp:
Mar 13, 2010, 1:54:58 PM (5 years ago)
Author:
oxygene
Message:

Fix supermicro/h8qme_fam10 by enabling SPD ROM properly.
Also configure GPIOs so the power LED is working.
Some whitespace cleanups (but by no means comprehensive)

Signed-off-by: Knut Kujat <knuku@…>
Acked-by: Myles Watson <mylesgw@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/mainboard/supermicro/h8qme_fam10/romstage.c

    r5201 r5203  
    9898static inline void activate_spd_rom(const struct mem_controller *ctrl)
    9999{
    100         /* nothing to do */
     100#define SMBUS_SWITCH1 0x70
     101#define SMBUS_SWITCH2 0x72
     102        smbus_send_byte(SMBUS_SWITCH1, 5 & 0x0f);
     103        smbus_send_byte(SMBUS_SWITCH2, (5 >> 4) & 0x0f);
    101104}
    102105
     
    240243#include "cpu/amd/model_10xxx/update_microcode.c"
    241244
     245#define GPIO1_DEV PNP_DEV(0x2e, W83627HF_GAME_MIDI_GPIO1)
     246#define GPIO2_DEV PNP_DEV(0x2e, W83627HF_GPIO2)
     247#define GPIO3_DEV PNP_DEV(0x2e, W83627HF_GPIO3)
     248void write_GPIO(void)
     249{
     250        pnp_enter_ext_func_mode(GPIO1_DEV);
     251        pnp_set_logical_device(GPIO1_DEV);
     252        pnp_write_config(GPIO1_DEV, 0x30, 0x01);
     253        pnp_write_config(GPIO1_DEV, 0x60, 0x00);
     254        pnp_write_config(GPIO1_DEV, 0x61, 0x00);
     255        pnp_write_config(GPIO1_DEV, 0x62, 0x00);
     256        pnp_write_config(GPIO1_DEV, 0x63, 0x00);
     257        pnp_write_config(GPIO1_DEV, 0x70, 0x00);
     258        pnp_write_config(GPIO1_DEV, 0xf0, 0xff);
     259        pnp_write_config(GPIO1_DEV, 0xf1, 0xff);
     260        pnp_write_config(GPIO1_DEV, 0xf2, 0x00);
     261        pnp_exit_ext_func_mode(GPIO1_DEV);
     262
     263        pnp_enter_ext_func_mode(GPIO2_DEV);
     264        pnp_set_logical_device(GPIO2_DEV);
     265        pnp_write_config(GPIO2_DEV, 0x30, 0x01);
     266        pnp_write_config(GPIO2_DEV, 0xf0, 0xef);
     267        pnp_write_config(GPIO2_DEV, 0xf1, 0xff);
     268        pnp_write_config(GPIO2_DEV, 0xf2, 0x00);
     269        pnp_write_config(GPIO2_DEV, 0xf3, 0x00);
     270        pnp_write_config(GPIO2_DEV, 0xf5, 0x48);
     271        pnp_write_config(GPIO2_DEV, 0xf6, 0x00);
     272        pnp_write_config(GPIO2_DEV, 0xf7, 0xc0);
     273        pnp_exit_ext_func_mode(GPIO2_DEV);
     274
     275        pnp_enter_ext_func_mode(GPIO3_DEV);
     276        pnp_set_logical_device(GPIO3_DEV);
     277        pnp_write_config(GPIO3_DEV, 0x30, 0x00);
     278        pnp_write_config(GPIO3_DEV, 0xf0, 0xff);
     279        pnp_write_config(GPIO3_DEV, 0xf1, 0xff);
     280        pnp_write_config(GPIO3_DEV, 0xf2, 0xff);
     281        pnp_write_config(GPIO3_DEV, 0xf3, 0x40);
     282        pnp_exit_ext_func_mode(GPIO3_DEV);
     283}
     284
    242285void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
    243286{
     
    262305        pnp_exit_ext_func_mode(SERIAL_DEV);
    263306
    264         uart_init();
    265         console_init();
    266   printk_debug("\n");
    267 
     307        uart_init();
     308        console_init();
     309        write_GPIO();
     310        printk_debug("\n");
    268311
    269312        /* Halt if there was a built in self test failure */
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