Changeset 5200


Ignore:
Timestamp:
Mar 10, 2010, 3:43:05 AM (5 years ago)
Author:
zbao
Message:

The following patch implements Opteron Fam 10 rev D (aka Istanbul)
support for coreboot. I have not updated MAX_CPUS for all fam10
mainboards, but it might make sense to multiply those by 1.5.

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@…>

I assume the line
pci_write_config32(NODE_PCI(nodeid, 0), 0x168, dword);
should be put outside the loop.

Everything seems to be fine. I don't have Istanbul to test. I have
read every changes and they all look good.

Acked-by: Zheng Bao <zheng.bao@…>

Location:
trunk/src
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/cpu/amd/model_10xxx/defaults.h

    r4562 r5200  
    316316} fam10_htphy_default[] = {
    317317
    318         /* Errata 344 - Fam10 C2
     318        /* Errata 344 - Fam10 C2/D0
    319319         * System software should set bit 6 of F4x1[9C, 94, 8C, 84]_x[78:70, 68:60]. */
    320         { 0x60, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    321           0x00000040, 0x00000040 },
    322         { 0x61, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    323           0x00000040, 0x00000040 },
    324         { 0x62, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    325           0x00000040, 0x00000040 },
    326         { 0x63, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    327           0x00000040, 0x00000040 },
    328         { 0x64, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    329           0x00000040, 0x00000040 },
    330         { 0x65, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    331           0x00000040, 0x00000040 },
    332         { 0x66, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    333           0x00000040, 0x00000040 },
    334         { 0x67, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    335           0x00000040, 0x00000040 },
    336         { 0x68, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    337           0x00000040, 0x00000040 },
    338 
    339         { 0x70, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    340           0x00000040, 0x00000040 },
    341         { 0x71, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    342           0x00000040, 0x00000040 },
    343         { 0x72, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    344           0x00000040, 0x00000040 },
    345         { 0x73, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    346           0x00000040, 0x00000040 },
    347         { 0x74, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    348           0x00000040, 0x00000040 },
    349         { 0x75, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    350           0x00000040, 0x00000040 },
    351         { 0x76, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    352           0x00000040, 0x00000040 },
    353         { 0x77, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    354           0x00000040, 0x00000040 },
    355         { 0x78, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     320        { 0x60, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     321          0x00000040, 0x00000040 },
     322        { 0x61, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     323          0x00000040, 0x00000040 },
     324        { 0x62, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     325          0x00000040, 0x00000040 },
     326        { 0x63, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     327          0x00000040, 0x00000040 },
     328        { 0x64, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     329          0x00000040, 0x00000040 },
     330        { 0x65, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     331          0x00000040, 0x00000040 },
     332        { 0x66, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     333          0x00000040, 0x00000040 },
     334        { 0x67, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     335          0x00000040, 0x00000040 },
     336        { 0x68, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     337          0x00000040, 0x00000040 },
     338
     339        { 0x70, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     340          0x00000040, 0x00000040 },
     341        { 0x71, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     342          0x00000040, 0x00000040 },
     343        { 0x72, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     344          0x00000040, 0x00000040 },
     345        { 0x73, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     346          0x00000040, 0x00000040 },
     347        { 0x74, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     348          0x00000040, 0x00000040 },
     349        { 0x75, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     350          0x00000040, 0x00000040 },
     351        { 0x76, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     352          0x00000040, 0x00000040 },
     353        { 0x77, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     354          0x00000040, 0x00000040 },
     355        { 0x78, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    356356          0x00000040, 0x00000040 },
    357357
     
    396396          0x00000040, 0x00000040 },
    397397
    398         /* Errata 327 - Fam10 C2
     398        /* Errata 327 - Fam10 C2/D0
    399399         * BIOS should set the Link Phy Impedance Register[RttCtl]
    400400         * (F4x1[9C, 94, 8C, 84]_x[D0, C0][31:29]) to 010b and
    401401         * Link Phy Impedance Register[RttIndex]
    402402         * (F4x1[9C, 94, 8C, 84]_x[D0, C0][20:16]) to 00100b */
    403         { 0xC0, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     403        { 0xC0, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    404404          0x40040000, 0xe01F0000 },
    405         { 0xD0, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     405        { 0xD0, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    406406          0x40040000, 0xe01F0000 },
    407407
    408         { 0x520A, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     408        { 0x520A, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    409409          0x00004000, 0x00006000 },     /* HT_PHY_DLL_REG */
    410410
    411         { 0x530A, AMD_RB_C2 | AMD_DA_C2, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
     411        { 0x530A, AMD_RB_C2 | AMD_DA_C2 | AMD_HY_D0, AMD_PTYPE_ALL, HTPHY_LINKTYPE_ALL,
    412412          0x00004000, 0x00006000 },     /* HT_PHY_DLL_REG */
    413413
  • trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c

    r4227 r5200  
    147147        { X86_VENDOR_AMD, 0x100F52 },           /* BL-C2 */
    148148        { X86_VENDOR_AMD, 0x100F62 },           /* DA-C2 */
     149        { X86_VENDOR_AMD, 0x100F80 },           /* HY-D0 */
    149150        { 0, 0 },
    150151};
  • trunk/src/cpu/amd/quadcore/quadcore.c

    r3266 r5200  
    3030        dword = pci_read_config32(NODE_PCI(nodeid, 3), 0xe8);
    3131        dword >>= 12;
    32         dword &= 3;
     32        /* Bit 15 is CmpCap[2] since Revision D. */
     33        if ((cpuid_ecx(0x80000008) & 0xff) > 3)
     34            dword = ((dword & 8) >> 1) | (dword & 3);
     35        else
     36            dword &= 3;
    3337        return dword;
    3438}
     
    5458static void real_start_other_core(u32 nodeid, u32 cores)
    5559{
    56         u32 dword;
     60        u32 dword, i;
    5761
    5862        printk_debug("Start other core - nodeid: %02x  cores: %02x\n", nodeid, cores);
     
    7074        if(cores > 1) {
    7175                dword = pci_read_config32(NODE_PCI(nodeid, 0), 0x168);
    72                 dword |= (1 << 0);      // core2
    73                 if(cores > 2) {         // core3
    74                         dword |= (1 << 1);
     76                for (i = 0; i < cores - 1; i++) {
     77                        dword |= 1 << i;
    7578                }
    7679                pci_write_config32(NODE_PCI(nodeid, 0), 0x168, dword);
  • trunk/src/northbridge/amd/amdfam10/northbridge.c

    r4788 r5200  
    13651365                        j = pci_read_config32(dev, 0xe8);
    13661366                        cores_found = (j >> 12) & 3; // dev is func 3
     1367                        if (siblings > 3)
     1368                                cores_found |= (j >> 13) & 4;
    13671369                        printk_debug("  %s siblings=%d\n", dev_path(dev), cores_found);
    13681370                }
  • trunk/src/northbridge/amd/amdfam10/raminit_amdmct.c

    r5185 r5200  
    151151                ret = AMD_DA_C2;
    152152                break;
     153        case 0x10080:
     154                ret = AMD_HY_D0;
     155                break;
    153156        default:
    154157                /* FIXME: mabe we should die() here. */
  • trunk/src/northbridge/amd/amdmct/amddefs.h

    r4562 r5200  
    4343#define AMD_RB_C2       0x01000000      /* Shanghai C2 */
    4444#define AMD_DA_C2       0x02000000      /* XXXX C2 */
     45#define AMD_HY_D0       0x04000000      /* Istanbul D0 */
    4546
    4647/*
     
    6061#define AMD_DR_GT_B0    (AMD_DR_ALL & ~(AMD_DR_B0))
    6162#define AMD_DR_ALL      (AMD_DR_Bx)
    62 #define AMD_FAM10_ALL   (AMD_DR_ALL | AMD_RB_C2)
     63#define AMD_FAM10_ALL   (AMD_DR_ALL | AMD_RB_C2 | AMD_HY_D0)
    6364#define AMD_FAM10_GT_B0 (AMD_FAM10_ALL & ~(AMD_DR_B0))
    6465
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