Changeset 5181

Timestamp:

Mar 1, 2010 6:16:06 PM (3 years ago)

Author:

oxygene

Message:

• Simplify stack size determination: MAX_CPUS * STACK_SIZE
• Check that this doesn't run into vga/oprom/bios area at link time
• Avoid overly complicated and not well understood hack which avoids that area by leaving a hole in the stack area.
• Adapt technexion/tim5690 to put ramstage at 1MB

Signed-off-by: Patrick Georgi <patrick.georgi@…>
Acked-by: Myles Watson <mylesgw@…>

Location:

trunk/src

Files:

• arch/i386/coreboot_ram.ld (modified) (2 diffs)
• cpu/x86/lapic/lapic_cpu_init.c (modified) (1 diff)
• mainboard/technexion/tim5690/Kconfig (modified) (1 diff)

trunk/src/arch/i386/coreboot_ram.ld

@@ -101 +101 @@
         _end = .;
         . = ALIGN(CONFIG_STACK_SIZE);
+
         _stack = .;
         .stack . : {
                 /* Reserve a stack for each possible cpu */
-                /* the stack for ap will be put after pgtbl in 1M to CONFIG_RAMTOP range when VGA and ROM_RUN and CONFIG_RAMTOP>1M*/
-                . += ((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN)&&(CONFIG_RAMBASE<0x100000)&&(CONFIG_RAMTOP>0x100000) ) ? CONFIG_STACK_SIZE : (CONFIG_MAX_CPUS*CONFIG_STACK_SIZE);
+                . += CONFIG_MAX_CPUS*CONFIG_STACK_SIZE;
         }
         _estack = .;
@@ -115 +115 @@
         }
         _eheap = .;
+
+        /* Avoid running into 0xa0000-0xfffff */
+        _bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
+
         /* The ram segment
          * This is all address of the memory resident copy of coreboot.

trunk/src/cpu/x86/lapic/lapic_cpu_init.c

@@ -247 +247 @@
 
         /* Find end of the new processors stack */
-#if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE < 0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
-        if(index<1) { // only keep bsp on low
-                stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
-        } else {
-                // for all APs, let use stack after pgtbl, 20480 is the pgtbl size for every cpu
-                stack_end = 0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS - (CONFIG_STACK_SIZE*index);
-#if (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP)
-                #warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS)\n"
-#endif
-                if(stack_end > (CONFIG_RAMTOP)) {
-                        printk_debug("start_cpu: Please increase the CONFIG_RAMTOP more than %luK\n", stack_end);
-                        die("Can not go on\n");
-                }
-                stack_end -= sizeof(struct cpu_info);
-        }
-#else
         stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
-#endif
-
 
         /* Record the index and which cpu structure we are using */

trunk/src/mainboard/technexion/tim5690/Kconfig

@@ -128 +128 @@
 config RAMBASE
         hex
-        default 0x4000
+        default 0x100000
         depends on BOARD_TECHNEXION_TIM5690