Changeset 5181


Ignore:
Timestamp:
Mar 1, 2010, 6:16:06 PM (5 years ago)
Author:
oxygene
Message:
  • Simplify stack size determination: MAX_CPUS * STACK_SIZE
  • Check that this doesn't run into vga/oprom/bios area at link time
  • Avoid overly complicated and not well understood hack which avoids that area by leaving a hole in the stack area.
  • Adapt technexion/tim5690 to put ramstage at 1MB

Signed-off-by: Patrick Georgi <patrick.georgi@…>
Acked-by: Myles Watson <mylesgw@…>

Location:
trunk/src
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/arch/i386/coreboot_ram.ld

    r5166 r5181  
    101101        _end = .;
    102102        . = ALIGN(CONFIG_STACK_SIZE);
     103
    103104        _stack = .;
    104105        .stack . : {
    105106                /* Reserve a stack for each possible cpu */
    106                 /* the stack for ap will be put after pgtbl in 1M to CONFIG_RAMTOP range when VGA and ROM_RUN and CONFIG_RAMTOP>1M*/
    107                 . += ((CONFIG_CONSOLE_VGA || CONFIG_PCI_ROM_RUN)&&(CONFIG_RAMBASE<0x100000)&&(CONFIG_RAMTOP>0x100000) ) ? CONFIG_STACK_SIZE : (CONFIG_MAX_CPUS*CONFIG_STACK_SIZE);
     107                . += CONFIG_MAX_CPUS*CONFIG_STACK_SIZE;
    108108        }
    109109        _estack = .;
     
    115115        }
    116116        _eheap = .;
     117
     118        /* Avoid running into 0xa0000-0xfffff */
     119        _bogus = ASSERT(CONFIG_RAMBASE >= 0x100000 || _eheap < 0xa0000, "Please move RAMBASE to 1MB");
     120
    117121        /* The ram segment
    118122         * This is all address of the memory resident copy of coreboot.
  • trunk/src/cpu/x86/lapic/lapic_cpu_init.c

    r5133 r5181  
    247247
    248248        /* Find end of the new processors stack */
    249 #if (CONFIG_RAMTOP>0x100000) && (CONFIG_RAMBASE < 0x100000) && ((CONFIG_CONSOLE_VGA==1) || (CONFIG_PCI_ROM_RUN == 1))
    250         if(index<1) { // only keep bsp on low
    251                 stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
    252         } else {
    253                 // for all APs, let use stack after pgtbl, 20480 is the pgtbl size for every cpu
    254                 stack_end = 0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS - (CONFIG_STACK_SIZE*index);
    255 #if (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS) > (CONFIG_RAMTOP)
    256                 #warning "We may need to increase CONFIG_RAMTOP, it need to be more than (0x100000+(20480 + CONFIG_STACK_SIZE)*CONFIG_MAX_CPUS)\n"
    257 #endif
    258                 if(stack_end > (CONFIG_RAMTOP)) {
    259                         printk_debug("start_cpu: Please increase the CONFIG_RAMTOP more than %luK\n", stack_end);
    260                         die("Can not go on\n");
    261                 }
    262                 stack_end -= sizeof(struct cpu_info);
    263         }
    264 #else
    265249        stack_end = ((unsigned long)_estack) - (CONFIG_STACK_SIZE*index) - sizeof(struct cpu_info);
    266 #endif
    267 
    268250
    269251        /* Record the index and which cpu structure we are using */
  • trunk/src/mainboard/technexion/tim5690/Kconfig

    r5171 r5181  
    128128config RAMBASE
    129129        hex
    130         default 0x4000
     130        default 0x100000
    131131        depends on BOARD_TECHNEXION_TIM5690
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