Changeset 5179


Ignore:
Timestamp:
Mar 1, 2010, 11:30:08 AM (5 years ago)
Author:
oxygene
Message:

Allow per-board setting of HT clock and width so
less than optimal PCB designs can still work reliably
with reduced clock.

Signed-off-by: Timothy Pearson <tpearson@…>
Acked-by: Patrick Georgi <patrick.georgi@…>

Location:
trunk/src
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/Kconfig

    r5177 r5179  
    5757source src/cpu/Kconfig
    5858comment "Northbridge"
     59
     60menu "HyperTransport Setup"
     61        depends on (NORTHBRIDGE_AMD_AMDK8 || NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
     62
     63choice
     64        prompt "HyperTransport Frequency"
     65        default LIMIT_HT_SPEED_AUTO
     66        help
     67          This option sets the maximum permissible HyperTransport link frequency.
     68          Use of this option will only limit the autodetected HT frequency; it will not (and cannot) increase the frequency beyond the autodetected limits.
     69          This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
     70
     71config LIMIT_HT_SPEED_200
     72        bool "Limit HT frequency to 200MHz"
     73config LIMIT_HT_SPEED_400
     74        bool "Limit HT frequency to 400MHz"
     75config LIMIT_HT_SPEED_600
     76        bool "Limit HT frequency to 600MHz"
     77config LIMIT_HT_SPEED_800
     78        bool "Limit HT frequency to 800MHz"
     79config LIMIT_HT_SPEED_1000
     80        bool "Limit HT frequency to 1.0GHz"
     81config LIMIT_HT_SPEED_1200
     82        bool "Limit HT frequency to 1.2GHz"
     83config LIMIT_HT_SPEED_1400
     84        bool "Limit HT frequency to 1.4GHz"
     85config LIMIT_HT_SPEED_1600
     86        bool "Limit HT frequency to 1.6GHz"
     87config LIMIT_HT_SPEED_1800
     88        bool "Limit HT frequency to 1.6GHz"
     89config LIMIT_HT_SPEED_2000
     90        bool "Limit HT frequency to 2.0GHz"
     91config LIMIT_HT_SPEED_2200
     92        bool "Limit HT frequency to 2.2GHz"
     93config LIMIT_HT_SPEED_2400
     94        bool "Limit HT frequency to 2.4GHz"
     95config LIMIT_HT_SPEED_2600
     96        bool "Limit HT frequency to 2.6GHz"
     97config LIMIT_HT_SPEED_AUTO
     98        bool "Autodetect HT frequency"
     99endchoice
     100
     101choice
     102        prompt "HyperTransport Downlink Width"
     103        default LIMIT_HT_DOWN_WIDTH_16
     104        help
     105          This option sets the maximum permissible HyperTransport link width.
     106          Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
     107          This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
     108
     109config LIMIT_HT_DOWN_WIDTH_8
     110        bool "8 bits"
     111config LIMIT_HT_DOWN_WIDTH_16
     112        bool "16 bits"
     113endchoice
     114
     115choice
     116        prompt "HyperTransport Uplink Width"
     117        default LIMIT_HT_UP_WIDTH_16
     118        help
     119          This option sets the maximum permissible HyperTransport link width.
     120          Use of this option will only limit the autodetected HT width; it will not (and cannot) increase the width beyond the autodetected limits.
     121          This is primarily used to work around poorly designed or laid out HT traces on certain motherboards.
     122
     123config LIMIT_HT_UP_WIDTH_8
     124        bool "8 bits"
     125config LIMIT_HT_UP_WIDTH_16
     126        bool "16 bits"
     127endchoice
     128
     129endmenu
     130
    59131source src/northbridge/Kconfig
    60132comment "Southbridge"
  • trunk/src/northbridge/amd/amdht/h3finit.c

    r3425 r5179  
    13281328        for (i = 0; i < pDat->TotalLinks*2; i += 2)
    13291329        {
    1330                 cbPCBFreqLimit = 0xFFFF;
     1330#if CONFIG_LIMIT_HT_SPEED_200
     1331                cbPCBFreqLimit = 0x0001;
     1332#elif CONFIG_LIMIT_HT_SPEED_300
     1333                cbPCBFreqLimit = 0x0003;
     1334#elif CONFIG_LIMIT_HT_SPEED_400
     1335                cbPCBFreqLimit = 0x0007;
     1336#elif CONFIG_LIMIT_HT_SPEED_500
     1337                cbPCBFreqLimit = 0x000F;
     1338#elif CONFIG_LIMIT_HT_SPEED_600
     1339                cbPCBFreqLimit = 0x001F;
     1340#elif CONFIG_LIMIT_HT_SPEED_800
     1341                cbPCBFreqLimit = 0x003F;
     1342#elif CONFIG_LIMIT_HT_SPEED_1000
     1343                cbPCBFreqLimit = 0x007F;
     1344#elif CONFIG_LIMIT_HT_SPEED_1200
     1345                cbPCBFreqLimit = 0x00FF;
     1346#elif CONFIG_LIMIT_HT_SPEED_1400
     1347                cbPCBFreqLimit = 0x01FF;
     1348#elif CONFIG_LIMIT_HT_SPEED_1600
     1349                cbPCBFreqLimit = 0x03FF;
     1350#elif CONFIG_LIMIT_HT_SPEED_1800
     1351                cbPCBFreqLimit = 0x07FF;
     1352#elif CONFIG_LIMIT_HT_SPEED_2000
     1353                cbPCBFreqLimit = 0x0FFF;
     1354#elif CONFIG_LIMIT_HT_SPEED_2200
     1355                cbPCBFreqLimit = 0x1FFF;
     1356#elif CONFIG_LIMIT_HT_SPEED_2400
     1357                cbPCBFreqLimit = 0x3FFF;
     1358#elif CONFIG_LIMIT_HT_SPEED_2600
     1359                cbPCBFreqLimit = 0x7FFF;
     1360#else
     1361                cbPCBFreqLimit = 0xFFFF;                // Maximum allowed by autoconfiguration
     1362#endif
     1363
     1364#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
     1365                cbPCBABDownstreamWidth = 8;
     1366#else
    13311367                cbPCBABDownstreamWidth = 16;
     1368#endif
     1369
     1370#if CONFIG_LIMIT_HT_UP_WIDTH_8
     1371                cbPCBBAUpstreamWidth = 8;
     1372#else
    13321373                cbPCBBAUpstreamWidth = 16;
     1374#endif
    13331375
    13341376                if ( (pDat->PortList[i].Type == PORTLIST_TYPE_CPU) && (pDat->PortList[i+1].Type == PORTLIST_TYPE_CPU))
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