Changeset 5177


Ignore:
Timestamp:
Mar 1, 2010, 9:34:19 AM (5 years ago)
Author:
stepan
Message:

This patch implements MBI (modular bios interface) support to the i830 chipset.
This is needed on the IP1000T to get VGA output. The VGA option rom will ask
through an SMI for hardware specifics (in form of a VBT, video bios table)
which the SMI handler copies into the VGA option rom.

Signed-off-by: Stefan Reinauer <stepan@…>
Acked-by: Ronald G. Minnich <rminnich@…>

Location:
trunk
Files:
7 added
26 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/Kconfig

    r5171 r5177  
    448448          video card (also in hex, without "0x" prefix).
    449449
     450config INTEL_MBI
     451        bool "Add an MBI image"
     452        depends on NORTHBRIDGE_INTEL_I82830
     453        help
     454          Select this option if you have an Intel MBI image that you would
     455          like to add to your ROM.
     456
     457          You will be able to specify the location and file name of the
     458          image later.
     459
     460config FALLBACK_MBI_FILE
     461        string "Intel MBI path and filename"
     462        depends on INTEL_MBI
     463        default "mbi.bin"
     464        help
     465          The path and filename of the file to use as VGA BIOS.
     466
     467endmenu
     468
     469menu "Bootsplash"
     470        depends on PCI_OPTION_ROM_RUN_YABEL
     471
     472config BOOTSPLASH
     473        prompt "Show graphical bootsplash"
     474        bool
     475        depends on PCI_OPTION_ROM_RUN_YABEL
     476        help
     477          This option shows a graphical bootsplash screen. The grapics are
     478          loaded from the CBFS file bootsplash.jpg.
     479
     480config FALLBACK_BOOTSPLASH_FILE
     481        string "Bootsplash path and filename"
     482        depends on BOOTSPLASH
     483        default "bootsplash.jpg"
     484        help
     485          The path and filename of the file to use as graphical bootsplash
     486          screen. The file format has to be jpg.
     487
     488# TODO: Turn this into a "choice".
     489config FRAMEBUFFER_VESA_MODE
     490        prompt "VESA framebuffer video mode"
     491        hex
     492        default 0x117
     493        depends on BOOTSPLASH
     494        help
     495          This option sets the resolution used for the coreboot framebuffer and
     496          bootsplash screen. Set to 0x117 for 1024x768x16. A diligent soul will
     497          some day make this a "choice".
     498
     499config COREBOOT_KEEP_FRAMEBUFFER
     500        prompt "Keep VESA framebuffer"
     501        bool
     502        depends on BOOTSPLASH
     503        help
     504          This option keeps the framebuffer mode set after coreboot finishes
     505          execution. If this option is enabled, coreboot will pass a
     506          framebuffer entry in its coreboot table and the payload will need a
     507          framebuffer driver. If this option is disabled, coreboot will switch
     508          back to text mode before handing control to a payload.
     509
    450510endmenu
    451511
  • trunk/src/arch/i386/Makefile.inc

    r5176 r5177  
    2929        $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom
    3030endif
     31ifeq ($(CONFIG_INTEL_MBI),y)
     32        @printf "    MBI        $(CONFIG_FALLBACK_MBI_FILE)\n"
     33        $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_MBI_FILE) mbi.bin mbi
     34endif
     35ifeq ($(CONFIG_BOOTSPLASH),y)
     36        @printf "    BOOTSPLASH $(CONFIG_FALLBACK_BOOTSPLASH_FILE)\n"
     37        $(CBFSTOOL) $(obj)/coreboot.rom add $(CONFIG_FALLBACK_BOOTSPLASH_FILE) bootsplash.jpg bootsplash
     38endif
    3139        @printf "    CBFSPRINT  $(subst $(obj)/,,$(@))\n\n"
    3240        $(CBFSTOOL) $(obj)/coreboot.rom print
  • trunk/src/devices/Kconfig

    r5146 r5177  
    168168          Enable this option for a good compromise between security and speed.
    169169
    170 config BOOTSPLASH
    171         prompt "Show graphical bootsplash"
    172         bool
    173         depends on PCI_OPTION_ROM_RUN_YABEL
    174         help
    175           This option shows a graphical bootsplash screen. The grapics are
    176           loaded from the CBFS file bootsplash.jpg.
    177 
    178 # TODO: Turn this into a "choice".
    179 config FRAMEBUFFER_VESA_MODE
    180         prompt "VESA framebuffer video mode"
    181         hex
    182         default 0x117
    183         depends on BOOTSPLASH
    184         help
    185           This option sets the resolution used for the coreboot framebuffer and
    186           bootsplash screen. Set to 0x117 for 1024x768x16. A diligent soul will
    187           some day make this a "choice".
    188 
    189 config COREBOOT_KEEP_FRAMEBUFFER
    190         prompt "Keep VESA framebuffer"
    191         bool
    192         depends on BOOTSPLASH
    193         help
    194           This option keeps the framebuffer mode set after coreboot finishes
    195           execution. If this option is enabled, coreboot will pass a
    196           framebuffer entry in its coreboot table and the payload will need a
    197           framebuffer driver. If this option is disabled, coreboot will switch
    198           back to text mode before handing control to a payload.
    199 
    200170config CONSOLE_VGA_MULTI
    201171        bool
  • trunk/src/include/cbfs.h

    r5146 r5177  
    6464    components */
    6565
    66 #define CBFS_TYPE_STAGE     0x10
    67 #define CBFS_TYPE_PAYLOAD   0x20
    68 #define CBFS_TYPE_OPTIONROM 0x30
     66#define CBFS_TYPE_STAGE      0x10
     67#define CBFS_TYPE_PAYLOAD    0x20
     68#define CBFS_TYPE_OPTIONROM  0x30
     69#define CBFS_TYPE_BOOTSPLASH 0x40
     70#define CBFS_TYPE_RAW        0x50
     71#define CBFS_TYPE_VSA        0x51
     72#define CBFS_TYPE_MBI        0x52
     73#define CBFS_TYPE_MICROCODE  0x53
    6974
    7075/** this is the master cbfs header - it need to be
     
    165170void *cbfs_load_optionrom(u16 vendor, u16 device, void * dest);
    166171int run_address(void *f);
    167 int cbfs_decompress(int algo, void *src, void *dst, int len);
    168 struct cbfs_stage *cbfs_find_file(const char *name, int type);
    169 int cbfs_check_magic(struct cbfs_file *file);
    170 struct cbfs_header *cbfs_master_header(void);
    171172struct cbfs_file *cbfs_find(const char *name);
     173void *cbfs_find_file(const char *name, int type);
    172174void cbfs_and_run_core(const char *filename, unsigned int ebp);
    173175
  • trunk/src/lib/Makefile.inc

    r5135 r5177  
    3232$(obj)/lib/version.o :: $(obj)/build.h
    3333endif
     34
     35smmobj-y += memcpy.o
  • trunk/src/lib/cbfs.c

    r5135 r5177  
    2525#include <arch/byteorder.h>
    2626
    27 int cbfs_decompress(int algo, void *src, void *dst, int len)
     27
     28/**
     29 * Decompression wrapper for CBFS
     30 * @param algo
     31 * @param src
     32 * @param dst
     33 * @param len
     34 * @return 0 on success, -1 on failure
     35 */
     36static int cbfs_decompress(int algo, void *src, void *dst, int len)
    2837{
    2938        switch(algo) {
     
    4554}
    4655
    47 int cbfs_check_magic(struct cbfs_file *file)
     56static int cbfs_check_magic(struct cbfs_file *file)
    4857{
    4958        return !strcmp(file->magic, CBFS_FILE_MAGIC) ? 1 : 0;
    5059}
    5160
    52 struct cbfs_header *cbfs_master_header(void)
     61static struct cbfs_header *cbfs_master_header(void)
    5362{
    5463        struct cbfs_header *header;
     
    104113}
    105114
    106 struct cbfs_stage *cbfs_find_file(const char *name, int type)
     115void *cbfs_find_file(const char *name, int type)
    107116{
    108117        struct cbfs_file *file = cbfs_find(name);
     
    124133}
    125134
    126 static int tohex4(unsigned int c)
     135static inline int tohex4(unsigned int c)
    127136{
    128137        return (c<=9)?(c+'0'):(c-10+'a');
     
    206215}
    207216
    208 void * cbfs_get_file(const char *name)
    209 {
    210         return (void *) cbfs_find(name);
    211 }
    212 
    213217int cbfs_execute_stage(const char *name)
    214218{
     
    234238 * jumps to it, returning the result.
    235239 * @param f the address to call as a function.
    236  * returns value returned by the function.
     240 * @return value returned by the function.
    237241 */
    238242
  • trunk/src/mainboard/rca/rm4100/Kconfig

    r5167 r5177  
    1010        select UDELAY_TSC
    1111        select BOARD_ROMSIZE_KB_512
     12        select HAVE_SMI_HANDLER
    1213
    1314config MAINBOARD_DIR
  • trunk/src/mainboard/rca/rm4100/Makefile.inc

    r5168 r5177  
    11ROMCCFLAGS=-mcpu=p3 -O
     2
     3smmobj-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.o
     4
  • trunk/src/mainboard/rca/rm4100/devicetree.cb

    r5167 r5177  
    11chip northbridge/intel/i82830           # Northbridge
     2  device apic_cluster 0 on              # APIC cluster
     3    chip cpu/intel/socket_PGA370        # Mobile Celeron Micro-FCBGA Socket 479
     4      device apic 0 on end              # APIC
     5    end
     6  end
    27  device pci_domain 0 on                # PCI domain
    38    device pci 0.0 on end               # Host bridge
     
    2025      device pci 1d.2 on end            # USB UHCI Controller #3
    2126      device pci 1d.7 on end            # USB2 EHCI Controller
    22       device pci 1e.0 on                # PCI bridge
    23         device pci 08.0 on end          # Intel 82801DB PRO/100 VE Ethernet
    24       end
     27      device pci 1e.0 on end            # PCI bridge
    2528      device pci 1f.0 on                # ISA/LPC bridge
    2629        chip superio/smsc/smscsuperio   # Super I/O
     
    6265    end
    6366  end
    64   device apic_cluster 0 on              # APIC cluster
    65     chip cpu/intel/socket_PGA370        # Mobile Celeron Micro-FCBGA Socket 479
    66       device apic 0 on end              # APIC
    67     end
    68   end
    6967end
    7068
  • trunk/src/mainboard/rca/rm4100/mainboard.c

    r4249 r5177  
    2222#include "chip.h"
    2323
     24static void mainboard_init(device_t dev)
     25{
     26        // TODO Switch parport LEDs again
     27}
     28
     29static void mainboard_enable(device_t dev)
     30{
     31        // TODO Switch parport LEDs
     32        dev->ops->init = mainboard_init;
     33}
     34 
    2435struct chip_operations mainboard_ops = {
     36        .enable_dev = mainboard_enable,
    2537        CHIP_NAME("RCA RM4100 Mainboard")
    2638};
  • trunk/src/mainboard/rca/rm4100/romstage.c

    r5167 r5177  
    4646
    4747#include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
     48#include "southbridge/intel/i82801dx/i82801dx_tco_timer.c"
    4849
    4950/**
     
    103104static void main(unsigned long bist)
    104105{
    105         if (bist == 0)
     106        if (bist == 0) {
    106107                early_mtrr_init();
    107108                if (memory_initialized()) {
    108109                        hard_reset();
    109110                }
     111        }
    110112
    111113        /* Set southbridge and superio gpios */
     
    119121        report_bist_failure(bist);
    120122
     123        /* disable TCO timers */
     124        i82801dx_halt_tco_timer();
     125
    121126        /* Setup mainboard specific registers */
    122127        mb_early_setup();
  • trunk/src/mainboard/thomson/ip1000/Kconfig

    r5167 r5177  
    1010        select UDELAY_TSC
    1111        select BOARD_ROMSIZE_KB_512
     12        select HAVE_SMI_HANDLER
    1213
    1314config MAINBOARD_DIR
  • trunk/src/mainboard/thomson/ip1000/Makefile.inc

    r5168 r5177  
    11ROMCCFLAGS=-mcpu=p3 -O
     2
     3smmobj-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.o
     4
  • trunk/src/mainboard/thomson/ip1000/devicetree.cb

    r5167 r5177  
    11chip northbridge/intel/i82830           # Northbridge
     2  device apic_cluster 0 on              # APIC cluster
     3    chip cpu/intel/socket_PGA370        # Low Voltage PIII Micro-FCBGA Socket 479
     4      device apic 0 on end              # APIC
     5    end
     6  end
     7
    28  device pci_domain 0 on                # PCI domain
    39    device pci 0.0 on end               # Host bridge
     
    2026      device pci 1d.2 on end            # USB UHCI Controller #3
    2127      device pci 1d.7 on end            # USB2 EHCI Controller
    22       device pci 1e.0 on                # PCI bridge
    23         device pci 08.0 on end          # Intel 82801DB PRO/100 VE Ethernet
    24       end
     28      device pci 1e.0 on end            # PCI bridge
    2529      device pci 1f.0 on                # ISA/LPC bridge
    2630        chip superio/smsc/smscsuperio   # Super I/O
     
    6266    end
    6367  end
    64   device apic_cluster 0 on              # APIC cluster
    65     chip cpu/intel/socket_PGA370        # Low Voltage PIII Micro-FCBGA Socket 479
    66       device apic 0 on end              # APIC
    67     end
    68   end
    6968end
    7069
  • trunk/src/mainboard/thomson/ip1000/mainboard.c

    r3954 r5177  
    2222#include "chip.h"
    2323
     24static void mainboard_init(device_t dev)
     25{
     26        // TODO Switch parport LEDs again
     27}
     28
     29static void mainboard_enable(device_t dev)
     30{
     31        // TODO Switch parport LEDs
     32        dev->ops->init = mainboard_init;
     33}
     34
    2435struct chip_operations mainboard_ops = {
     36        .enable_dev = mainboard_enable,
    2537        CHIP_NAME("THOMSON IP1000 Mainboard")
    2638};
  • trunk/src/mainboard/thomson/ip1000/romstage.c

    r5167 r5177  
    4646
    4747#include "southbridge/intel/i82801dx/i82801dx_early_smbus.c"
     48#include "southbridge/intel/i82801dx/i82801dx_tco_timer.c"
    4849
    4950/**
     
    103104static void main(unsigned long bist)
    104105{
    105         if (bist == 0)
     106        if (bist == 0) {
    106107                early_mtrr_init();
    107108                if (memory_initialized()) {
    108109                        hard_reset();
    109110                }
     111        }
    110112
    111113        /* Set southbridge and superio gpios */
     
    119121        report_bist_failure(bist);
    120122
     123        /* disable TCO timers */
     124        i82801dx_halt_tco_timer();
     125
    121126        /* Setup mainboard specific registers */
    122127        mb_early_setup();
  • trunk/src/northbridge/intel/i82830/Makefile.inc

    r4673 r5177  
    11driver-y += northbridge.o
    22driver-y += vga.o
     3
     4smmobj-$(CONFIG_HAVE_SMI_HANDLER) += i82830_smihandler.o
  • trunk/src/northbridge/intel/i82830/northbridge.c

    r5140 r5177  
    117117                tomk = ((unsigned long)pci_read_config8(mc_dev, DRB + 3)) << 15;
    118118                tomk -= igd_memory;
    119                 printk_debug("Setting RAM size to %ld\n", tomk);
     119                printk_debug("Memory detected: %ldKB RAM\n", tomk);
    120120
    121121                /* Compute the top of low memory. */
  • trunk/src/northbridge/intel/i82830/raminit.c

    r5073 r5177  
    537537        value = pci_read_config16(NORTHBRIDGE, GCC1);
    538538        value |= igd_memory << 4;
     539        value |= 1; // 64MB aperture
    539540        pci_write_config16(NORTHBRIDGE, GCC1, value);
    540541
  • trunk/src/northbridge/intel/i82830/vga.c

    r4250 r5177  
    2525#include <device/pci.h>
    2626#include <device/pci_ids.h>
     27#include <cbfs.h>
     28#include <x86emu/x86emu.h>
    2729
    28 static void vga_init(device_t dev) {
     30static void vga_init(device_t dev)
     31{
     32        printk_info("Starting Graphics Initialization\n");
     33        struct cbfs_file *file = cbfs_find("mbi.bin");
     34        void *mbi = NULL;
     35        unsigned int mbi_len = 0;
    2936
    30         printk_info("Starting Graphics Initialization\n");
     37        if (file) {
     38                if (ntohl(file->type) != CBFS_TYPE_MBI) {
     39                        printk_info( "CBFS:  MBI binary is of type %x instead of"
     40                               "type %x\n", file->type, CBFS_TYPE_MBI);
     41                } else {
     42                        mbi = (void *) CBFS_SUBHEADER(file);
     43                        mbi_len = file->len;
     44                }
     45        } else {
     46                printk_info( "Could not find MBI.\n");
     47        }
     48
     49        if (mbi && mbi_len) {
     50                /* The GDT or coreboot table is going to live here. But
     51                 * a long time after we relocated the GNVS, so this is
     52                 * not troublesome.
     53                 */
     54                *(u32 *)0x500 = (u32)mbi;
     55                *(u32 *)0x504 = (u32)mbi_len;
     56                outb(0xeb, 0xb2);
     57        }
     58
    3159        pci_dev_init(dev);
    3260        printk_info("Graphics Initialization Complete\n");
    33         /* Future TV-OUT code will be called from here. */
     61
     62        /* Enable TV-Out */
     63#if defined(CONFIG_PCI_OPTION_ROM_RUN_YABEL) && CONFIG_PCI_OPTION_ROM_RUN_YABEL
     64#define PIPE_A_CRT      (1 << 0)
     65#define PIPE_A_LFP      (1 << 1)
     66#define PIPE_A_TV       (1 << 3)
     67#define PIPE_B_CRT      (1 << 8)
     68#define PIPE_B_TV       (1 << 10)
     69        printk_debug("Enabling TV-Out\n");
     70        void runInt10(void);
     71        M.x86.R_AX = 0x5f64;
     72        M.x86.R_BX = 0x0001; // Set Display Device, force execution
     73        M.x86.R_CX = PIPE_A_CRT | PIPE_A_TV;
     74        // M.x86.R_CX = PIPE_B_TV;
     75        runInt10();
     76        switch (M.x86.R_AX) {
     77        case 0x005f:
     78                printk_debug("... failed.\n");
     79                break;
     80        case 0x015f:
     81                printk_debug("... ok.\n");
     82                break;
     83        default:
     84                printk_debug("... not supported.\n");
     85                break;
     86        }
     87#endif
    3488}
    3589
  • trunk/src/southbridge/intel/i82801dx/Kconfig

    r5167 r5177  
    11config SOUTHBRIDGE_INTEL_I82801DX
    22        bool
     3        select IOAPIC
  • trunk/src/southbridge/intel/i82801dx/Makefile.inc

    r5167 r5177  
    88#driver-y += i82801dx_pci.o
    99obj-y += i82801dx_reset.o
     10
     11obj-$(CONFIG_HAVE_SMI_HANDLER) += i82801dx_smi.o
     12smmobj-$(CONFIG_HAVE_SMI_HANDLER) += i82801dx_smihandler.o
  • trunk/src/southbridge/intel/i82801dx/i82801dx_ac97.c

    r5167 r5177  
    11/*
    2  * (C) 2003 Linux Networx
     2 * This file is part of the coreboot project.
     3 *
     4 * Copyright (C) 2008-2009 coresystems GmbH
     5 *
     6 * This program is free software; you can redistribute it and/or
     7 * modify it under the terms of the GNU General Public License as
     8 * published by the Free Software Foundation; version 2 of
     9 * the License.
     10 *
     11 * This program is distributed in the hope that it will be useful,
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     14 * GNU General Public License for more details.
     15 *
     16 * You should have received a copy of the GNU General Public License
     17 * along with this program; if not, write to the Free Software
     18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
    319 */
     20
    421#include <console/console.h>
    522#include <device/device.h>
    623#include <device/pci.h>
    724#include <device/pci_ids.h>
    8 #include <device/pci_ops.h>
     25#include <arch/io.h>
     26#include <delay.h>
    927#include "i82801dx.h"
    1028
    11 
    12 static struct device_operations ac97audio_ops  = {
     29#define NAMBAR          0x10
     30#define   MASTER_VOL    0x02
     31#define   PAGING        0x24
     32#define   EXT_AUDIO     0x28
     33#define   FUNC_SEL      0x66
     34#define   INFO_IO       0x68
     35#define   CONNECTOR     0x6a
     36#define   VENDOR_ID1    0x7c
     37#define   VENDOR_ID2    0x7e
     38#define   SEC_VENDOR_ID1 0xfc
     39#define   SEC_VENDOR_ID2 0xfe
     40
     41#define NABMBAR         0x14
     42#define   GLOB_CNT      0x2c
     43#define   GLOB_STA      0x30
     44#define   CAS           0x34
     45
     46#define MMBAR           0x10
     47#define   EXT_MODEM_ID1 0x3c
     48#define   EXT_MODEM_ID2 0xbc
     49
     50#define MBAR            0x14
     51#define   SEC_CODEC     0x40
     52
     53
     54/* FIXME. This table is probably mainboard specific */
     55static u16 ac97_function[16*2][4] = {
     56        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     57        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     58        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     59        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     60        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     61        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     62        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     63        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     64        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     65        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     66        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     67        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     68        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     69        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     70        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     71        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     72        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     73        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     74        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     75        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     76        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     77        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     78        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     79        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     80        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     81        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     82        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     83        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     84        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     85        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     86        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
     87        { (1 << 5), (2 << 11), (1 << 10), (3 << 13) }
     88};
     89
     90static u16 nabmbar;
     91static u16 nambar;
     92
     93static int ac97_semaphore(void)
     94{
     95        int timeout;
     96        u8 reg8;
     97
     98        timeout = 0xffff;
     99        do {
     100                reg8 = inb(nabmbar + CAS);
     101                timeout--;
     102        } while ((reg8 & 1) && timeout);
     103        if (! timeout) {
     104                printk_debug("Timeout!\n");
     105        }
     106
     107        return (!timeout);
     108}
     109
     110static void init_cnr(void)
     111{
     112        // TODO
     113}
     114
     115static void program_sigid(struct device *dev, u32 id)
     116{
     117        pci_write_config32(dev, 0x2c, id);
     118}
     119
     120static void ac97_audio_init(struct device *dev)
     121{
     122        u16 reg16;
     123        u32 reg32;
     124        int i;
     125
     126        printk_debug("Initializing AC'97 Audio.\n");
     127
     128        /* top 16 bits are zero, so don't read them */
     129        nabmbar = pci_read_config16(dev, NABMBAR) & 0xfffe;
     130        nambar = pci_read_config16(dev, NAMBAR) & 0xfffe;
     131
     132        reg16 = inw(nabmbar + GLOB_CNT);
     133        reg16 |= (1 << 1); /* Remove AC_RESET# */
     134        outw(reg16, nabmbar + GLOB_CNT);
     135
     136        /* Wait 600ms. Ouch. */
     137        udelay(600 * 1000);
     138
     139        init_cnr();
     140
     141        /* Detect Primary AC'97 Codec */
     142        reg32 = inl(nabmbar + GLOB_STA);
     143        if ((reg32 & ((1 << 28) | (1 << 9) | (1 << 8))) == 0) {
     144                /* Primary Codec not found */
     145                printk_debug("No primary codec. Disabling AC'97 Audio.\n");
     146                return;
     147        }
     148
     149        ac97_semaphore();
     150
     151        /* Detect if codec is programmable */
     152        outw(0x8000, nambar + MASTER_VOL);
     153        ac97_semaphore();
     154        if (inw(nambar + MASTER_VOL) != 0x8000) {
     155                printk_debug("Codec not programmable. Disabling AC'97 Audio.\n");
     156                return;
     157        }
     158
     159        /* Program Vendor IDs */
     160        reg32 = inw(nambar + VENDOR_ID1);
     161        reg32 <<= 16;
     162        reg32 |= (u16)inw(nambar + VENDOR_ID2);
     163
     164        program_sigid(dev, reg32);
     165
     166        /* Is Codec AC'97 2.3 compliant? */
     167        reg16 = inw(nambar + EXT_AUDIO);
     168        /* [11:10] = 10b -> AC'97 2.3 */
     169        if ((reg16 & 0x0c00) != 0x0800) {
     170                /* No 2.3 Codec. We're done */
     171                return;
     172        }
     173
     174        /* Select Page 1 */
     175        reg16 = inw(nambar + PAGING);
     176        reg16 &= 0xfff0;
     177        reg16 |= 0x0001;
     178        outw(reg16, nambar + PAGING);
     179
     180        for (i = 0x0a * 2; i > 0; i--) {
     181                outw(i, nambar + FUNC_SEL);
     182
     183                /* Function could not be selected. Next one */
     184                if (inw(nambar + FUNC_SEL) != i)
     185                        continue;
     186
     187                reg16 = inw(nambar + INFO_IO);
     188
     189                /* Function Information present? */
     190                if (!(reg16 & (1 << 0)))
     191                        continue;
     192
     193                /* Function Information valid? */
     194                if (!(reg16 & (1 << 4)))
     195                        continue;
     196
     197                /* Program Buffer Delay [9:5] */
     198                reg16 &= 0x03e0;
     199                reg16 |= ac97_function[i][0];
     200
     201                /* Program Gain [15:11] */
     202                reg16 |= ac97_function[i][1];
     203
     204                /* Program Inversion [10] */
     205                reg16 |= ac97_function[i][2];
     206
     207                outw(reg16, nambar + INFO_IO);
     208
     209                /* Program Connector / Jack Location */
     210                reg16 = inw(nambar + CONNECTOR);
     211                reg16 &= 0x1fff;
     212                reg16 |= ac97_function[i][3];
     213                outw(reg16, nambar + CONNECTOR);
     214        }
     215}
     216
     217static void ac97_modem_init(struct device *dev)
     218{
     219        u16 reg16;
     220        u32 reg32;
     221        u16 mmbar, mbar;
     222
     223        mmbar = pci_read_config16(dev, MMBAR) & 0xfffe;
     224        mbar = pci_read_config16(dev, MBAR) & 0xfffe;
     225
     226        reg16 = inw(mmbar + EXT_MODEM_ID1);
     227        if ((reg16 & 0xc000) != 0xc000 ) {
     228                if (reg16 & (1 << 0)) {
     229                        reg32 = inw(mmbar + VENDOR_ID2);
     230                        reg32 <<= 16;
     231                        reg32 |= (u16)inw(mmbar + VENDOR_ID1);
     232                        program_sigid(dev, reg32);
     233                        return;
     234                }
     235        }
     236
     237        /* Secondary codec? */
     238        reg16 = inw(mbar + SEC_CODEC);
     239        if ((reg16 & (1 << 9)) == 0)
     240                return;
     241
     242        reg16 = inw(mmbar + EXT_MODEM_ID2);
     243        if ((reg16 & 0xc000) == 0x4000) {
     244                if (reg16 & (1 << 0)) {
     245                        reg32 = inw(mmbar + SEC_VENDOR_ID2);
     246                        reg32 <<= 16;
     247                        reg32 |= (u16)inw(mmbar + SEC_VENDOR_ID1);
     248                        program_sigid(dev, reg32);
     249                        return;
     250                }
     251        }
     252}
     253
     254static struct device_operations ac97_audio_ops  = {
    13255        .read_resources   = pci_dev_read_resources,
    14256        .set_resources    = pci_dev_set_resources,
    15257        .enable_resources = pci_dev_enable_resources,
    16258        .enable           = i82801dx_enable,
    17         .init             = 0,
     259        .init             = ac97_audio_init,
    18260        .scan_bus         = 0,
    19261};
    20262
    21 static const struct pci_driver ac97audio_driver __pci_driver = {
    22         .ops    = &ac97audio_ops,
    23         .vendor = PCI_VENDOR_ID_INTEL,
    24         .device = PCI_DEVICE_ID_INTEL_82801DBM_AC97_AUDIO,
    25 };
    26 
    27 
    28 static struct device_operations ac97modem_ops  = {
     263static struct device_operations ac97_modem_ops  = {
    29264        .read_resources   = pci_dev_read_resources,
    30265        .set_resources    = pci_dev_set_resources,
    31266        .enable_resources = pci_dev_enable_resources,
    32267        .enable           = i82801dx_enable,
    33         .init             = 0,
     268        .init             = ac97_modem_init,
    34269        .scan_bus         = 0,
    35270};
    36271
    37 static const struct pci_driver ac97modem_driver __pci_driver = {
    38         .ops    = &ac97modem_ops,
    39         .vendor = PCI_VENDOR_ID_INTEL,
    40         .device = PCI_DEVICE_ID_INTEL_82801DBM_AC97_MODEM,
    41 };
     272/* 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) */
     273static const struct pci_driver i82801db_ac97_audio __pci_driver = {
     274        .ops    = &ac97_audio_ops,
     275        .vendor = PCI_VENDOR_ID_INTEL,
     276        .device = PCI_DEVICE_ID_INTEL_82801DB_AC97_AUDIO,
     277};
     278
     279static const struct pci_driver i82801db_ac97_modem __pci_driver = {
     280        .ops    = &ac97_modem_ops,
     281        .vendor = PCI_VENDOR_ID_INTEL,
     282        .device = PCI_DEVICE_ID_INTEL_82801DB_AC97_MODEM,
     283};
     284
     285
  • trunk/util/cbfstool/cbfs.h

    r4630 r5177  
    6969    components */
    7070
    71 #define CBFS_COMPONENT_STAGE     0x10
    72 #define CBFS_COMPONENT_PAYLOAD   0x20
    73 #define CBFS_COMPONENT_OPTIONROM 0x30
     71#define CBFS_COMPONENT_STAGE      0x10
     72#define CBFS_COMPONENT_PAYLOAD    0x20
     73#define CBFS_COMPONENT_OPTIONROM  0x30
     74#define CBFS_COMPONENT_BOOTSPLASH 0x40
     75#define CBFS_COMPONENT_RAW        0x50
     76#define CBFS_COMPONENT_VSA        0x51
     77#define CBFS_COMPONENT_MBI        0x52
     78#define CBFS_COMPONENT_MICROCODE  0x53
    7479
    7580/* The deleted type is chosen to be a value
  • trunk/util/cbfstool/common.c

    r5112 r5177  
    129129        {CBFS_COMPONENT_PAYLOAD, "payload"},
    130130        {CBFS_COMPONENT_OPTIONROM, "optionrom"},
     131        {CBFS_COMPONENT_BOOTSPLASH, "bootsplash"},
     132        {CBFS_COMPONENT_RAW, "raw"},
     133        {CBFS_COMPONENT_VSA, "vsa"},
     134        {CBFS_COMPONENT_MBI, "mbi"},
     135        {CBFS_COMPONENT_MICROCODE, "microcode"},
    131136        {CBFS_COMPONENT_DELETED, "deleted"},
    132137        {CBFS_COMPONENT_NULL, "null"}
  • trunk/util/x86emu/yabel/vbe.c

    r5135 r5177  
    796796        int imagesize = 1024*768*2;
    797797       
    798         struct cbfs_file *file = cbfs_find("bootsplash.jpg");
    799         if (!file) {
     798        unsigned char *jpeg = cbfs_find_file("bootsplash.jpg", CBFS_TYPE_BOOTSPLASH);
     799        if (!jpeg) {
    800800                DEBUG_PRINTF_VBE("Could not find bootsplash.jpg\n");
    801801                return;
    802802        }
    803         unsigned char *jpeg = ((unsigned char *)file) + ntohl(file->offset);
    804803        DEBUG_PRINTF_VBE("Splash at %08x ...\n", jpeg);
    805804        dump(jpeg, 64);
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