Changeset 5162
- Timestamp:
- Feb 25, 2010 6:03:17 PM (3 years ago)
- Location:
- trunk
- Files:
-
- 50 edited
-
Makefile (modified) (1 diff)
-
src/arch/i386/Makefile.inc (modified) (1 diff)
-
src/cpu/via/model_c3/Kconfig (modified) (1 diff)
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src/cpu/via/model_c7/Kconfig (modified) (1 diff)
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src/mainboard/Makefile.k8_CAR.inc (modified) (1 diff)
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src/mainboard/Makefile.k8_ck804.inc (modified) (1 diff)
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src/mainboard/Makefile.romccboard.inc (modified) (1 diff)
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src/mainboard/amd/db800/Makefile.inc (modified) (1 diff)
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src/mainboard/amd/dbm690t/Makefile.inc (modified) (1 diff)
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src/mainboard/amd/norwich/Makefile.inc (modified) (1 diff)
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src/mainboard/amd/pistachio/Makefile.inc (modified) (1 diff)
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src/mainboard/amd/serengeti_cheetah/Makefile.inc (modified) (1 diff)
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src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc (modified) (1 diff)
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src/mainboard/artecgroup/dbe61/Makefile.inc (modified) (1 diff)
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src/mainboard/asus/a8n_e/Makefile.inc (modified) (1 diff)
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src/mainboard/asus/a8v-e_se/Makefile.inc (modified) (1 diff)
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src/mainboard/asus/m2v-mx_se/Makefile.inc (modified) (1 diff)
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src/mainboard/bcom/winnetp680/Makefile.inc (modified) (1 diff)
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src/mainboard/digitallogic/msm800sev/Makefile.inc (modified) (1 diff)
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src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc (modified) (1 diff)
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src/mainboard/gigabyte/m57sli/Makefile.inc (modified) (1 diff)
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src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc (modified) (1 diff)
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src/mainboard/intel/d945gclf/Makefile.inc (modified) (1 diff)
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src/mainboard/intel/eagleheights/Makefile.inc (modified) (1 diff)
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src/mainboard/iwill/dk8_htx/Makefile.inc (modified) (1 diff)
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src/mainboard/jetway/j7f24/Makefile.inc (modified) (1 diff)
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src/mainboard/kontron/986lcd-m/Makefile.inc (modified) (1 diff)
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src/mainboard/kontron/kt690/Makefile.inc (modified) (1 diff)
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src/mainboard/lippert/roadrunner-lx/Makefile.inc (modified) (1 diff)
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src/mainboard/lippert/spacerunner-lx/Makefile.inc (modified) (1 diff)
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src/mainboard/msi/ms7260/Makefile.inc (modified) (1 diff)
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src/mainboard/msi/ms9282/Makefile.inc (modified) (1 diff)
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src/mainboard/nvidia/l1_2pvv/Makefile.inc (modified) (1 diff)
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src/mainboard/pcengines/alix1c/Makefile.inc (modified) (1 diff)
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src/mainboard/roda/rk886ex/Makefile.inc (modified) (1 diff)
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src/mainboard/supermicro/h8dme/Makefile.inc (modified) (1 diff)
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src/mainboard/supermicro/h8dmr/Makefile.inc (modified) (1 diff)
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src/mainboard/supermicro/h8dmr_fam10/Makefile.inc (modified) (1 diff)
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src/mainboard/supermicro/h8qme_fam10/Makefile.inc (modified) (1 diff)
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src/mainboard/technexion/tim5690/Makefile.inc (modified) (1 diff)
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src/mainboard/technexion/tim8690/Makefile.inc (modified) (1 diff)
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src/mainboard/tyan/s2735/Makefile.inc (modified) (1 diff)
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src/mainboard/tyan/s2912/Makefile.inc (modified) (1 diff)
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src/mainboard/tyan/s2912_fam10/Makefile.inc (modified) (1 diff)
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src/mainboard/via/epia-m/Makefile.inc (modified) (1 diff)
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src/mainboard/via/epia-m700/Makefile.inc (modified) (1 diff)
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src/mainboard/via/epia-n/Makefile.inc (modified) (1 diff)
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src/mainboard/via/epia/Makefile.inc (modified) (1 diff)
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src/mainboard/via/vt8454c/Makefile.inc (modified) (1 diff)
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src/mainboard/winent/pl6064/Makefile.inc (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/Makefile
r5156 r5162 219 219 @echo alldirs:=$(alldirs) 220 220 @echo allsrc=$(allsrc) 221 222 printcrt0s: 223 @echo $(patsubst $(top)/%,%,$(crt0s)) 221 224 222 225 OBJS := $(patsubst %,$(obj)/%,$(TARGETS-y)) -
trunk/src/arch/i386/Makefile.inc
r5157 r5162 63 63 # done 64 64 65 # crt0s should be set by now 66 ifeq ($(crt0s),) 67 $(error crt0s are empty. If your board still uses crt0-y and ldscript-y: It shouldn't, we moved away from that in r5065) 65 crt0s := 66 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 67 crt0s += $(src)/cpu/x86/16bit/entry16.inc 68 endif 69 crt0s += $(src)/cpu/x86/32bit/entry32.inc 70 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 71 crt0s += $(src)/cpu/x86/16bit/reset16.inc 72 ifeq ($(CONFIG_ROMCC),y) 73 crt0s += $(src)/arch/i386/lib/cpu_reset.inc 74 endif 75 crt0s += $(src)/arch/i386/lib/id.inc 76 endif 77 78 crt0s += $(src)/cpu/x86/fpu_enable.inc 79 ifeq ($(CONFIG_CPU_AMD_GX1),y) 80 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc 81 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc 82 endif 83 ifeq ($(CONFIG_SSE),y) 84 crt0s += $(src)/cpu/x86/sse_enable.inc 85 endif 86 87 ifeq ($(CONFIG_CPU_AMD_LX),y) 88 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 89 endif 90 ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y) 91 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 92 endif 93 ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y) 94 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 95 endif 96 ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y) 97 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 98 endif 99 ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y) 100 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 101 endif 102 ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y) 103 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 104 endif 105 ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y) 106 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 107 endif 108 ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y) 109 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 110 endif 111 ifeq ($(CONFIG_CPU_INTEL_CORE),y) 112 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 113 endif 114 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used. 115 ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y) 116 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 117 endif 118 # should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet 119 ifeq ($(CONFIG_BOARD_VIA_VT8454C),y) 120 crt0s += $(src)/cpu/via/car/cache_as_ram.inc 121 endif 122 ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y) 123 crt0s += $(src)/cpu/via/car/cache_as_ram.inc 124 endif 125 # who else could use this? 126 ifeq ($(CONFIG_BOARD_TYAN_S2735),y) 127 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc 128 endif 129 130 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 131 ifeq ($(CONFIG_ROMCC),y) 132 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc 133 endif 134 endif 135 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 136 137 ifeq ($(CONFIG_SSE),y) 138 crt0s += $(src)/cpu/x86/sse_disable.inc 139 endif 140 ifeq ($(CONFIG_MMX),y) 141 crt0s += $(src)/cpu/x86/mmx_disable.inc 142 endif 143 144 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 145 ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y) 146 crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc 147 endif 148 ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y) 149 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 150 endif 151 ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y) 152 crt0s += $(src)/southbridge/via/k8t890/romstrap.inc 153 endif 154 ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y) 155 crt0s += $(src)/northbridge/via/vx800/romstrap.inc 156 endif 68 157 endif 69 158 -
trunk/src/cpu/via/model_c3/Kconfig
r5054 r5162 2 2 bool 3 3 select UDELAY_TSC 4 select MMX -
trunk/src/cpu/via/model_c7/Kconfig
r5159 r5162 2 2 bool 3 3 select UDELAY_TSC 4 select MMX 4 5 select SSE2 -
trunk/src/mainboard/Makefile.k8_CAR.inc
r5150 r5162 34 34 initobj-y += crt0.o 35 35 36 crt0s := $(src)/cpu/x86/16bit/entry16.inc37 crt0s += $(src)/cpu/x86/32bit/entry32.inc38 crt0s += $(src)/cpu/x86/16bit/reset16.inc39 crt0s += $(src)/arch/i386/lib/id.inc40 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc42 36 43 37 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/Makefile.k8_ck804.inc
r5150 r5162 37 37 initobj-y += crt0.o 38 38 39 crt0s := $(src)/cpu/x86/16bit/entry16.inc40 crt0s += $(src)/cpu/x86/32bit/entry32.inc41 crt0s += $(src)/cpu/x86/16bit/reset16.inc42 crt0s += $(src)/arch/i386/lib/id.inc43 crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc44 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc46 39 47 40 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/Makefile.romccboard.inc
r5150 r5162 22 22 initobj-y += crt0.o 23 23 24 crt0s :=25 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)26 crt0s += $(src)/cpu/x86/16bit/entry16.inc27 endif28 crt0s += $(src)/cpu/x86/32bit/entry32.inc29 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)30 crt0s += $(src)/cpu/x86/16bit/reset16.inc31 crt0s += $(src)/arch/i386/lib/cpu_reset.inc32 crt0s += $(src)/arch/i386/lib/id.inc33 endif34 crt0s += $(src)/cpu/x86/fpu_enable.inc35 ifeq ($(CONFIG_CPU_AMD_GX1),y)36 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc37 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc38 endif39 ifeq ($(CONFIG_SSE),y)40 crt0s += $(src)/cpu/x86/sse_enable.inc41 endif42 ifeq ($(CONFIG_BIG_BOOTBLOCK),y)43 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc44 endif45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc46 ifeq ($(CONFIG_SSE),y)47 crt0s += $(src)/cpu/x86/sse_disable.inc48 endif49 ifeq ($(CONFIG_MMX),y)50 crt0s += $(src)/cpu/x86/mmx_disable.inc51 endif52 53 24 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 54 25 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -
trunk/src/mainboard/amd/db800/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 crt0s := $(src)/cpu/x86/16bit/entry16.inc10 crt0s += $(src)/cpu/x86/32bit/entry32.inc11 crt0s += $(src)/cpu/x86/16bit/reset16.inc12 crt0s += $(src)/arch/i386/lib/id.inc13 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc14 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc15 9 16 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/amd/dbm690t/Makefile.inc
r5150 r5162 32 32 initobj-y += crt0.o 33 33 34 crt0s := $(src)/cpu/x86/16bit/entry16.inc35 crt0s += $(src)/cpu/x86/32bit/entry32.inc36 crt0s += $(src)/cpu/x86/16bit/reset16.inc37 crt0s += $(src)/arch/i386/lib/id.inc38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc40 34 41 35 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/amd/norwich/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/amd/pistachio/Makefile.inc
r5150 r5162 31 31 32 32 initobj-y += crt0.o 33 # FIXME in $(top)/Makefile34 crt0s := $(src)/cpu/x86/16bit/entry16.inc35 crt0s += $(src)/cpu/x86/32bit/entry32.inc36 crt0s += $(src)/cpu/x86/16bit/reset16.inc37 crt0s += $(src)/arch/i386/lib/id.inc38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc40 33 41 34 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc
r5150 r5162 36 36 37 37 initobj-y += crt0.o 38 # FIXME in $(top)/Makefile39 crt0s := $(src)/cpu/x86/16bit/entry16.inc40 crt0s += $(src)/cpu/x86/32bit/entry32.inc41 crt0s += $(src)/cpu/x86/16bit/reset16.inc42 crt0s += $(src)/arch/i386/lib/id.inc43 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc45 38 46 39 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
r5150 r5162 39 39 40 40 initobj-y += crt0.o 41 # FIXME in $(top)/Makefile42 crt0s := $(src)/cpu/x86/32bit/entry32.inc43 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc45 41 46 42 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/artecgroup/dbe61/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/asus/a8n_e/Makefile.inc
r5150 r5162 28 28 29 29 initobj-y += crt0.o 30 # FIXME in $(top)/Makefile31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc37 30 38 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/asus/a8v-e_se/Makefile.inc
r5150 r5162 10 10 11 11 initobj-y += crt0.o 12 # FIXME in $(top)/Makefile13 crt0s := $(src)/cpu/x86/16bit/entry16.inc14 crt0s += $(src)/southbridge/via/k8t890/romstrap.inc15 crt0s += $(src)/cpu/x86/32bit/entry32.inc16 crt0s += $(src)/cpu/x86/16bit/reset16.inc17 crt0s += $(src)/arch/i386/lib/id.inc18 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc19 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc20 12 21 13 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc
r5150 r5162 28 28 29 29 initobj-y += crt0.o 30 # FIXME in $(top)/Makefile31 crt0s := $(src)/cpu/x86/32bit/entry32.inc32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc34 30 35 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/bcom/winnetp680/Makefile.inc
r5099 r5162 35 35 ldscripts += $(src)/arch/i386/lib/failover.lds 36 36 37 crt0s := $(src)/cpu/x86/16bit/entry16.inc38 crt0s += $(src)/cpu/x86/32bit/entry32.inc39 crt0s += $(src)/cpu/x86/16bit/reset16.inc40 crt0s += $(src)/arch/i386/lib/id.inc41 crt0s += $(src)/cpu/x86/fpu_enable.inc42 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc43 crt0s += $(src)/cpu/x86/mmx_disable.inc44 37 -
trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
r5150 r5162 29 29 # This is part of the conversion to init-obj and away from included code. 30 30 initobj-y += crt0.o 31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc37 31 38 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/gigabyte/m57sli/Makefile.inc
r5150 r5162 32 32 # This is part of the conversion to init-obj and away from included code. 33 33 initobj-y += crt0.o 34 crt0s := $(src)/cpu/x86/16bit/entry16.inc35 crt0s += $(src)/cpu/x86/32bit/entry32.inc36 crt0s += $(src)/cpu/x86/16bit/reset16.inc37 crt0s += $(src)/arch/i386/lib/id.inc38 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc39 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc40 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc41 34 42 35 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/intel/d945gclf/Makefile.inc
r5150 r5162 36 36 37 37 initobj-y += crt0.o 38 # FIXME in $(top)/Makefile39 crt0s := $(src)/cpu/x86/16bit/entry16.inc40 crt0s += $(src)/cpu/x86/32bit/entry32.inc41 crt0s += $(src)/cpu/x86/16bit/reset16.inc42 crt0s += $(src)/arch/i386/lib/id.inc43 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc45 38 46 39 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/intel/eagleheights/Makefile.inc
r5150 r5162 10 10 11 11 initobj-y += crt0.o 12 # FIXME in $(top)/Makefile13 crt0s := $(src)/cpu/x86/16bit/entry16.inc14 crt0s += $(src)/cpu/x86/32bit/entry32.inc15 crt0s += $(src)/cpu/x86/16bit/reset16.inc16 crt0s += $(src)/arch/i386/lib/id.inc17 12 # Use Intel Core (not Core 2) code for CAR init, any CPU might be used. 18 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc19 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc20 13 21 14 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/iwill/dk8_htx/Makefile.inc
r5150 r5162 35 35 36 36 initobj-y += crt0.o 37 # FIXME in $(top)/Makefile38 crt0s := $(src)/cpu/x86/16bit/entry16.inc39 crt0s += $(src)/cpu/x86/32bit/entry32.inc40 crt0s += $(src)/cpu/x86/16bit/reset16.inc41 crt0s += $(src)/arch/i386/lib/id.inc42 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc43 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc44 37 45 38 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/jetway/j7f24/Makefile.inc
r5099 r5162 31 31 ldscripts += $(src)/arch/i386/lib/failover.lds 32 32 33 crt0s := $(src)/cpu/x86/16bit/entry16.inc34 crt0s += $(src)/cpu/x86/32bit/entry32.inc35 crt0s += $(src)/cpu/x86/16bit/reset16.inc36 crt0s += $(src)/arch/i386/lib/id.inc37 crt0s += $(src)/cpu/x86/fpu_enable.inc38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc39 crt0s += $(src)/cpu/x86/mmx_disable.inc40 33 -
trunk/src/mainboard/kontron/986lcd-m/Makefile.inc
r5150 r5162 37 37 initobj-y += crt0.o 38 38 39 crt0s := $(src)/cpu/x86/32bit/entry32.inc40 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc42 39 43 40 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/kontron/kt690/Makefile.inc
r5150 r5162 31 31 32 32 initobj-y += crt0.o 33 # FIXME in $(top)/Makefile34 crt0s := $(src)/cpu/x86/16bit/entry16.inc35 crt0s += $(src)/cpu/x86/32bit/entry32.inc36 crt0s += $(src)/cpu/x86/16bit/reset16.inc37 crt0s += $(src)/arch/i386/lib/id.inc38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc40 33 41 34 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/msi/ms7260/Makefile.inc
r5150 r5162 29 29 # This is part of the conversion to init-obj and away from included code. 30 30 initobj-y += crt0.o 31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc37 31 38 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/msi/ms9282/Makefile.inc
r5150 r5162 31 31 # This is part of the conversion to init-obj and away from included code. 32 32 initobj-y += crt0.o 33 crt0s := $(src)/cpu/x86/16bit/entry16.inc34 crt0s += $(src)/cpu/x86/32bit/entry32.inc35 crt0s += $(src)/cpu/x86/16bit/reset16.inc36 crt0s += $(src)/arch/i386/lib/id.inc37 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc39 33 40 34 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc
r5150 r5162 29 29 # This is part of the conversion to init-obj and away from included code. 30 30 initobj-y += crt0.o 31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc38 31 39 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/pcengines/alix1c/Makefile.inc
r5150 r5162 7 7 8 8 initobj-y += crt0.o 9 # FIXME in $(top)/Makefile10 crt0s := $(src)/cpu/x86/16bit/entry16.inc11 crt0s += $(src)/cpu/x86/32bit/entry32.inc12 crt0s += $(src)/cpu/x86/16bit/reset16.inc13 crt0s += $(src)/arch/i386/lib/id.inc14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc16 9 17 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/roda/rk886ex/Makefile.inc
r5150 r5162 38 38 39 39 initobj-y += crt0.o 40 # FIXME in $(top)/Makefile41 crt0s := $(src)/cpu/x86/16bit/entry16.inc42 crt0s += $(src)/cpu/x86/32bit/entry32.inc43 crt0s += $(src)/cpu/x86/16bit/reset16.inc44 crt0s += $(src)/arch/i386/lib/id.inc45 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc46 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc47 40 48 41 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/supermicro/h8dme/Makefile.inc
r5150 r5162 29 29 30 30 initobj-y += crt0.o 31 # FIXME in $(top)/Makefile32 crt0s := $(src)/cpu/x86/16bit/entry16.inc33 crt0s += $(src)/cpu/x86/32bit/entry32.inc34 crt0s += $(src)/cpu/x86/16bit/reset16.inc35 crt0s += $(src)/arch/i386/lib/id.inc36 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc37 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc39 31 40 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/supermicro/h8dmr/Makefile.inc
r5150 r5162 28 28 29 29 initobj-y += crt0.o 30 # FIXME in $(top)/Makefile31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc38 30 39 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
r5150 r5162 28 28 29 29 initobj-y += crt0.o 30 # FIXME in $(top)/Makefile31 crt0s := $(src)/cpu/x86/32bit/entry32.inc32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc34 30 35 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
r5150 r5162 28 28 29 29 initobj-y += crt0.o 30 # FIXME in $(top)/Makefile31 crt0s := $(src)/cpu/x86/32bit/entry32.inc32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc34 30 35 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/technexion/tim5690/Makefile.inc
r5150 r5162 37 37 38 38 initobj-y += crt0.o 39 # FIXME in $(top)/Makefile40 crt0s := $(src)/cpu/x86/16bit/entry16.inc41 crt0s += $(src)/cpu/x86/32bit/entry32.inc42 crt0s += $(src)/cpu/x86/16bit/reset16.inc43 crt0s += $(src)/arch/i386/lib/id.inc44 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc46 39 47 40 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/technexion/tim8690/Makefile.inc
r5150 r5162 31 31 32 32 initobj-y += crt0.o 33 # FIXME in $(top)/Makefile34 crt0s := $(src)/cpu/x86/16bit/entry16.inc35 crt0s += $(src)/cpu/x86/32bit/entry32.inc36 crt0s += $(src)/cpu/x86/16bit/reset16.inc37 crt0s += $(src)/arch/i386/lib/id.inc38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc40 33 41 34 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/tyan/s2735/Makefile.inc
r5150 r5162 33 33 34 34 initobj-y += crt0.o 35 # FIXME in $(top)/Makefile36 crt0s := $(src)/cpu/x86/16bit/entry16.inc37 crt0s += $(src)/cpu/x86/32bit/entry32.inc38 crt0s += $(src)/cpu/x86/16bit/reset16.inc39 crt0s += $(src)/arch/i386/lib/id.inc40 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc42 35 43 36 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/tyan/s2912/Makefile.inc
r5150 r5162 29 29 # This is part of the conversion to init-obj and away from included code. 30 30 initobj-y += crt0.o 31 crt0s := $(src)/cpu/x86/16bit/entry16.inc32 crt0s += $(src)/cpu/x86/32bit/entry32.inc33 crt0s += $(src)/cpu/x86/16bit/reset16.inc34 crt0s += $(src)/arch/i386/lib/id.inc35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc38 31 39 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc
r5150 r5162 29 29 # This is part of the conversion to init-obj and away from included code. 30 30 initobj-y += crt0.o 31 crt0s := $(src)/cpu/x86/32bit/entry32.inc32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc34 31 35 32 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/via/epia-m/Makefile.inc
r5099 r5162 31 31 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 32 32 ldscripts += $(src)/cpu/x86/16bit/entry16.lds 33 ldscripts += $(src)/northbridge/via/vx800/romstrap.lds34 33 ldscripts += $(src)/cpu/x86/16bit/reset16.lds 35 34 ldscripts += $(src)/arch/i386/lib/id.lds 36 35 ldscripts += $(src)/arch/i386/lib/failover.lds 37 36 38 crt0s := $(src)/cpu/x86/16bit/entry16.inc39 crt0s += $(src)/cpu/x86/32bit/entry32.inc40 crt0s += $(src)/cpu/x86/16bit/reset16.inc41 crt0s += $(src)/northbridge/via/vx800/romstrap.inc42 crt0s += $(src)/arch/i386/lib/id.inc43 crt0s += $(src)/cpu/x86/fpu_enable.inc44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc45 crt0s += $(src)/cpu/x86/mmx_disable.inc46 37 -
trunk/src/mainboard/via/epia-m700/Makefile.inc
r5099 r5162 37 37 ldscripts += $(src)/arch/i386/lib/failover.lds 38 38 39 crt0s := $(src)/cpu/x86/16bit/entry16.inc40 crt0s += $(src)/cpu/x86/32bit/entry32.inc41 crt0s += $(src)/cpu/x86/16bit/reset16.inc42 crt0s += $(src)/northbridge/via/vx800/romstrap.inc43 crt0s += $(src)/arch/i386/lib/id.inc44 crt0s += $(src)/cpu/via/car/cache_as_ram.inc45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc46 39 -
trunk/src/mainboard/via/epia-n/Makefile.inc
r5099 r5162 34 34 ldscripts += $(src)/arch/i386/lib/failover.lds 35 35 36 crt0s := $(src)/cpu/x86/16bit/entry16.inc37 crt0s += $(src)/cpu/x86/32bit/entry32.inc38 crt0s += $(src)/cpu/x86/16bit/reset16.inc39 crt0s += $(src)/arch/i386/lib/id.inc40 crt0s += $(src)/cpu/x86/fpu_enable.inc41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc42 crt0s += $(src)/cpu/x86/mmx_disable.inc43 36 -
trunk/src/mainboard/via/epia/Makefile.inc
r5099 r5162 30 30 ldscripts += $(src)/arch/i386/lib/failover.lds 31 31 32 crt0s := $(src)/cpu/x86/16bit/entry16.inc33 crt0s += $(src)/cpu/x86/32bit/entry32.inc34 crt0s += $(src)/cpu/x86/16bit/reset16.inc35 crt0s += $(src)/arch/i386/lib/id.inc36 crt0s += $(src)/cpu/x86/fpu_enable.inc37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc38 crt0s += $(src)/cpu/x86/mmx_disable.inc39 32 -
trunk/src/mainboard/via/vt8454c/Makefile.inc
r5150 r5162 27 27 28 28 initobj-y += crt0.o 29 # FIXME in $(top)/Makefile30 crt0s := $(src)/cpu/x86/16bit/entry16.inc31 crt0s += $(src)/cpu/x86/32bit/entry32.inc32 crt0s += $(src)/cpu/x86/16bit/reset16.inc33 crt0s += $(src)/arch/i386/lib/id.inc34 crt0s += $(src)/cpu/via/car/cache_as_ram.inc35 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc36 29 37 30 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb -
trunk/src/mainboard/winent/pl6064/Makefile.inc
r5158 r5162 7 7 8 8 initobj-y += crt0.o 9 crt0s := $(src)/cpu/x86/16bit/entry16.inc10 crt0s += $(src)/cpu/x86/32bit/entry32.inc11 crt0s += $(src)/cpu/x86/16bit/reset16.inc12 crt0s += $(src)/arch/i386/lib/id.inc13 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc14 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc15 9 16 10 ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
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