Changeset 5162


Ignore:
Timestamp:
Feb 25, 2010 6:03:17 PM (3 years ago)
Author:
oxygene
Message:

Unify crt0s setup to src/arch/i386/Makefile.inc. This variable
is not something users have to concern themselves with anymore.

Also fixes some wrong romstrap configs for boards, fixing a couple
of them.

Also add "make printcrt0s" target for debugging crt0s when updating
modified checkouts.

Signed-off-by: Patrick Georgi <patrick.georgi@…>
Acked-by: Uwe Hermann <uwe@…>

Location:
trunk
Files:
50 edited

Legend:

Unmodified
Added
Removed
  • trunk/Makefile

    r5156 r5162  
    219219        @echo alldirs:=$(alldirs) 
    220220        @echo allsrc=$(allsrc) 
     221 
     222printcrt0s: 
     223        @echo $(patsubst $(top)/%,%,$(crt0s)) 
    221224 
    222225OBJS     := $(patsubst %,$(obj)/%,$(TARGETS-y)) 
  • trunk/src/arch/i386/Makefile.inc

    r5157 r5162  
    6363# done 
    6464 
    65 # crt0s should be set by now 
    66 ifeq ($(crt0s),) 
    67 $(error crt0s are empty. If your board still uses crt0-y and ldscript-y: It shouldn't, we moved away from that in r5065) 
     65crt0s := 
     66ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
     67crt0s += $(src)/cpu/x86/16bit/entry16.inc 
     68endif 
     69crt0s += $(src)/cpu/x86/32bit/entry32.inc 
     70ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
     71crt0s += $(src)/cpu/x86/16bit/reset16.inc 
     72ifeq ($(CONFIG_ROMCC),y) 
     73crt0s += $(src)/arch/i386/lib/cpu_reset.inc 
     74endif 
     75crt0s += $(src)/arch/i386/lib/id.inc 
     76endif 
     77 
     78crt0s += $(src)/cpu/x86/fpu_enable.inc 
     79ifeq ($(CONFIG_CPU_AMD_GX1),y) 
     80crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc 
     81crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc 
     82endif 
     83ifeq ($(CONFIG_SSE),y) 
     84crt0s += $(src)/cpu/x86/sse_enable.inc 
     85endif 
     86 
     87ifeq ($(CONFIG_CPU_AMD_LX),y) 
     88crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
     89endif 
     90ifeq ($(CONFIG_CPU_AMD_SOCKET_F),y) 
     91crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     92endif 
     93ifeq ($(CONFIG_CPU_AMD_SOCKET_F_1207),y) 
     94crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     95endif 
     96ifeq ($(CONFIG_CPU_AMD_SOCKET_AM2),y) 
     97crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     98endif 
     99ifeq ($(CONFIG_CPU_AMD_SOCKET_S1G1),y) 
     100crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     101endif 
     102ifeq ($(CONFIG_CPU_AMD_SOCKET_754),y) 
     103crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     104endif 
     105ifeq ($(CONFIG_CPU_AMD_SOCKET_939),y) 
     106crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     107endif 
     108ifeq ($(CONFIG_CPU_AMD_SOCKET_940),y) 
     109crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
     110endif 
     111ifeq ($(CONFIG_CPU_INTEL_CORE),y) 
     112crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
     113endif 
     114# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. 
     115ifeq ($(CONFIG_CPU_INTEL_SOCKET_BGA956),y) 
     116crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
     117endif 
     118# should be CONFIG_CPU_VIA_C7, but bcom/winnetp680, jetway/j7f24, via/epia-cn, via/pc2500e don't use CAR yet 
     119ifeq ($(CONFIG_BOARD_VIA_VT8454C),y) 
     120crt0s += $(src)/cpu/via/car/cache_as_ram.inc 
     121endif 
     122ifeq ($(CONFIG_BOARD_VIA_EPIA_M700),y) 
     123crt0s += $(src)/cpu/via/car/cache_as_ram.inc 
     124endif 
     125# who else could use this? 
     126ifeq ($(CONFIG_BOARD_TYAN_S2735),y) 
     127crt0s += $(src)/cpu/x86/car/cache_as_ram.inc 
     128endif 
     129 
     130ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
     131ifeq ($(CONFIG_ROMCC),y) 
     132crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc 
     133endif 
     134endif 
     135crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
     136 
     137ifeq ($(CONFIG_SSE),y) 
     138crt0s += $(src)/cpu/x86/sse_disable.inc 
     139endif 
     140ifeq ($(CONFIG_MMX),y) 
     141crt0s += $(src)/cpu/x86/mmx_disable.inc 
     142endif 
     143 
     144ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
     145ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y) 
     146crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc 
     147endif 
     148ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y) 
     149crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
     150endif 
     151ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y) 
     152crt0s += $(src)/southbridge/via/k8t890/romstrap.inc 
     153endif 
     154ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y) 
     155crt0s += $(src)/northbridge/via/vx800/romstrap.inc 
     156endif 
    68157endif 
    69158 
  • trunk/src/cpu/via/model_c3/Kconfig

    r5054 r5162  
    22        bool 
    33        select UDELAY_TSC 
     4        select MMX 
  • trunk/src/cpu/via/model_c7/Kconfig

    r5159 r5162  
    22        bool 
    33        select UDELAY_TSC 
     4        select MMX 
    45        select SSE2 
  • trunk/src/mainboard/Makefile.k8_CAR.inc

    r5150 r5162  
    3434initobj-y += crt0.o 
    3535 
    36 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    37 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    38 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    39 crt0s += $(src)/arch/i386/lib/id.inc 
    40 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4236 
    4337ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/Makefile.k8_ck804.inc

    r5150 r5162  
    3737initobj-y += crt0.o 
    3838 
    39 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    40 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    41 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    42 crt0s += $(src)/arch/i386/lib/id.inc 
    43 crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc 
    44 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4639 
    4740ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/Makefile.romccboard.inc

    r5150 r5162  
    2222initobj-y += crt0.o 
    2323 
    24 crt0s := 
    25 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
    26 crt0s += $(src)/cpu/x86/16bit/entry16.inc 
    27 endif 
    28 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    29 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
    30 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    31 crt0s += $(src)/arch/i386/lib/cpu_reset.inc 
    32 crt0s += $(src)/arch/i386/lib/id.inc 
    33 endif 
    34 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    35 ifeq ($(CONFIG_CPU_AMD_GX1),y) 
    36 crt0s += $(src)/cpu/amd/model_gx1/cpu_setup.inc 
    37 crt0s += $(src)/cpu/amd/model_gx1/gx_setup.inc 
    38 endif 
    39 ifeq ($(CONFIG_SSE),y) 
    40 crt0s += $(src)/cpu/x86/sse_enable.inc 
    41 endif 
    42 ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
    43 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc 
    44 endif 
    45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    46 ifeq ($(CONFIG_SSE),y) 
    47 crt0s += $(src)/cpu/x86/sse_disable.inc 
    48 endif 
    49 ifeq ($(CONFIG_MMX),y) 
    50 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    51 endif 
    52  
    5324ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
    5425ifeq ($(CONFIG_BIG_BOOTBLOCK),y) 
  • trunk/src/mainboard/amd/db800/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    10 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    11 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    12 crt0s += $(src)/arch/i386/lib/id.inc 
    13 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    14 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    159 
    1610ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/amd/dbm690t/Makefile.inc

    r5150 r5162  
    3232initobj-y += crt0.o 
    3333 
    34 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    35 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    36 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    37 crt0s += $(src)/arch/i386/lib/id.inc 
    38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4034 
    4135ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/amd/norwich/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/amd/pistachio/Makefile.inc

    r5150 r5162  
    3131 
    3232initobj-y += crt0.o 
    33 # FIXME in $(top)/Makefile 
    34 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    35 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    36 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    37 crt0s += $(src)/arch/i386/lib/id.inc 
    38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4033 
    4134ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/amd/serengeti_cheetah/Makefile.inc

    r5150 r5162  
    3636 
    3737initobj-y += crt0.o 
    38 # FIXME in $(top)/Makefile 
    39 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    40 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    41 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    42 crt0s += $(src)/arch/i386/lib/id.inc 
    43 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4538 
    4639ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc

    r5150 r5162  
    3939 
    4040initobj-y += crt0.o 
    41 # FIXME in $(top)/Makefile 
    42 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    43 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4541 
    4642ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/artecgroup/dbe61/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/asus/a8n_e/Makefile.inc

    r5150 r5162  
    2828 
    2929initobj-y += crt0.o 
    30 # FIXME in $(top)/Makefile 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3730 
    3831ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/asus/a8v-e_se/Makefile.inc

    r5150 r5162  
    1010 
    1111initobj-y += crt0.o 
    12 # FIXME in $(top)/Makefile 
    13 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    14 crt0s += $(src)/southbridge/via/k8t890/romstrap.inc 
    15 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    16 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    17 crt0s += $(src)/arch/i386/lib/id.inc 
    18 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    19 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    2012 
    2113ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/asus/m2v-mx_se/Makefile.inc

    r5150 r5162  
    2828 
    2929initobj-y += crt0.o 
    30 # FIXME in $(top)/Makefile 
    31 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3430 
    3531ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/bcom/winnetp680/Makefile.inc

    r5099 r5162  
    3535ldscripts += $(src)/arch/i386/lib/failover.lds 
    3636 
    37 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    38 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    39 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    40 crt0s += $(src)/arch/i386/lib/id.inc 
    41 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    42 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    43 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    4437 
  • trunk/src/mainboard/digitallogic/msm800sev/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc

    r5150 r5162  
    2929# This is part of the conversion to init-obj and away from included code.  
    3030initobj-y += crt0.o 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3731 
    3832ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/gigabyte/m57sli/Makefile.inc

    r5150 r5162  
    3232# This is part of the conversion to init-obj and away from included code.  
    3333initobj-y += crt0.o 
    34 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    35 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    36 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    37 crt0s += $(src)/arch/i386/lib/id.inc 
    38 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
    39 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    40 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4134 
    4235ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/intel/d945gclf/Makefile.inc

    r5150 r5162  
    3636 
    3737initobj-y += crt0.o 
    38 # FIXME in $(top)/Makefile 
    39 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    40 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    41 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    42 crt0s += $(src)/arch/i386/lib/id.inc 
    43 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
    44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4538 
    4639ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/intel/eagleheights/Makefile.inc

    r5150 r5162  
    1010 
    1111initobj-y += crt0.o 
    12 # FIXME in $(top)/Makefile 
    13 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    14 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    15 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    16 crt0s += $(src)/arch/i386/lib/id.inc 
    1712# Use Intel Core (not Core 2) code for CAR init, any CPU might be used. 
    18 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
    19 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    2013 
    2114ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/iwill/dk8_htx/Makefile.inc

    r5150 r5162  
    3535 
    3636initobj-y += crt0.o 
    37 # FIXME in $(top)/Makefile 
    38 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    39 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    40 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    41 crt0s += $(src)/arch/i386/lib/id.inc 
    42 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    43 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4437 
    4538ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/jetway/j7f24/Makefile.inc

    r5099 r5162  
    3131ldscripts += $(src)/arch/i386/lib/failover.lds 
    3232 
    33 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    34 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    35 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    36 crt0s += $(src)/arch/i386/lib/id.inc 
    37 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    39 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    4033 
  • trunk/src/mainboard/kontron/986lcd-m/Makefile.inc

    r5150 r5162  
    3737initobj-y += crt0.o 
    3838 
    39 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    40 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
    41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4239 
    4340ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/kontron/kt690/Makefile.inc

    r5150 r5162  
    3131 
    3232initobj-y += crt0.o 
    33 # FIXME in $(top)/Makefile 
    34 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    35 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    36 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    37 crt0s += $(src)/arch/i386/lib/id.inc 
    38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4033 
    4134ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/lippert/roadrunner-lx/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/lippert/spacerunner-lx/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/msi/ms7260/Makefile.inc

    r5150 r5162  
    2929# This is part of the conversion to init-obj and away from included code.  
    3030initobj-y += crt0.o 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    36 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3731 
    3832ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/msi/ms9282/Makefile.inc

    r5150 r5162  
    3131# This is part of the conversion to init-obj and away from included code.  
    3232initobj-y += crt0.o 
    33 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    34 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    35 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    36 crt0s += $(src)/arch/i386/lib/id.inc 
    37 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3933 
    4034ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/nvidia/l1_2pvv/Makefile.inc

    r5150 r5162  
    2929# This is part of the conversion to init-obj and away from included code.  
    3030initobj-y += crt0.o 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
    36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3831 
    3932ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/pcengines/alix1c/Makefile.inc

    r5150 r5162  
    77 
    88initobj-y += crt0.o 
    9 # FIXME in $(top)/Makefile 
    10 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    11 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    12 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    13 crt0s += $(src)/arch/i386/lib/id.inc 
    14 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    15 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    169 
    1710ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/roda/rk886ex/Makefile.inc

    r5150 r5162  
    3838 
    3939initobj-y += crt0.o 
    40 # FIXME in $(top)/Makefile 
    41 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    42 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    43 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    44 crt0s += $(src)/arch/i386/lib/id.inc 
    45 crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc 
    46 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4740 
    4841ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/supermicro/h8dme/Makefile.inc

    r5150 r5162  
    2929 
    3030initobj-y += crt0.o 
    31 # FIXME in $(top)/Makefile 
    32 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    33 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    34 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    35 crt0s += $(src)/arch/i386/lib/id.inc 
    36 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
    37 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    38 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3931 
    4032ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/supermicro/h8dmr/Makefile.inc

    r5150 r5162  
    2828 
    2929initobj-y += crt0.o 
    30 # FIXME in $(top)/Makefile 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
    36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3830 
    3931ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc

    r5150 r5162  
    2828 
    2929initobj-y += crt0.o 
    30 # FIXME in $(top)/Makefile 
    31 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3430 
    3531ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/supermicro/h8qme_fam10/Makefile.inc

    r5150 r5162  
    2828 
    2929initobj-y += crt0.o 
    30 # FIXME in $(top)/Makefile 
    31 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3430 
    3531ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/technexion/tim5690/Makefile.inc

    r5150 r5162  
    3737 
    3838initobj-y += crt0.o 
    39 # FIXME in $(top)/Makefile 
    40 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    41 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    42 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    43 crt0s += $(src)/arch/i386/lib/id.inc 
    44 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4639 
    4740ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/technexion/tim8690/Makefile.inc

    r5150 r5162  
    3131 
    3232initobj-y += crt0.o 
    33 # FIXME in $(top)/Makefile 
    34 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    35 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    36 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    37 crt0s += $(src)/arch/i386/lib/id.inc 
    38 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    39 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4033 
    4134ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/tyan/s2735/Makefile.inc

    r5150 r5162  
    3333 
    3434initobj-y += crt0.o 
    35 # FIXME in $(top)/Makefile 
    36 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    37 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    38 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    39 crt0s += $(src)/arch/i386/lib/id.inc 
    40 crt0s += $(src)/cpu/x86/car/cache_as_ram.inc 
    41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4235 
    4336ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/tyan/s2912/Makefile.inc

    r5150 r5162  
    2929# This is part of the conversion to init-obj and away from included code.  
    3030initobj-y += crt0.o 
    31 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    32 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    33 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    34 crt0s += $(src)/arch/i386/lib/id.inc 
    35 crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc 
    36 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3831 
    3932ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/tyan/s2912_fam10/Makefile.inc

    r5150 r5162  
    2929# This is part of the conversion to init-obj and away from included code.  
    3030initobj-y += crt0.o 
    31 crt0s := $(src)/cpu/x86/32bit/entry32.inc 
    32 crt0s += $(src)/cpu/amd/car/cache_as_ram.inc 
    33 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3431 
    3532ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/via/epia-m/Makefile.inc

    r5099 r5162  
    3131ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
    3232ldscripts += $(src)/cpu/x86/16bit/entry16.lds 
    33 ldscripts += $(src)/northbridge/via/vx800/romstrap.lds 
    3433ldscripts += $(src)/cpu/x86/16bit/reset16.lds 
    3534ldscripts += $(src)/arch/i386/lib/id.lds 
    3635ldscripts += $(src)/arch/i386/lib/failover.lds 
    3736 
    38 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    39 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    40 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    41 crt0s += $(src)/northbridge/via/vx800/romstrap.inc 
    42 crt0s += $(src)/arch/i386/lib/id.inc 
    43 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    44 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    45 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    4637 
  • trunk/src/mainboard/via/epia-m700/Makefile.inc

    r5099 r5162  
    3737ldscripts += $(src)/arch/i386/lib/failover.lds 
    3838 
    39 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    40 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    41 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    42 crt0s += $(src)/northbridge/via/vx800/romstrap.inc 
    43 crt0s += $(src)/arch/i386/lib/id.inc 
    44 crt0s += $(src)/cpu/via/car/cache_as_ram.inc 
    45 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    4639 
  • trunk/src/mainboard/via/epia-n/Makefile.inc

    r5099 r5162  
    3434ldscripts += $(src)/arch/i386/lib/failover.lds 
    3535 
    36 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    37 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    38 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    39 crt0s += $(src)/arch/i386/lib/id.inc 
    40 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    41 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    42 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    4336 
  • trunk/src/mainboard/via/epia/Makefile.inc

    r5099 r5162  
    3030ldscripts += $(src)/arch/i386/lib/failover.lds 
    3131 
    32 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    33 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    34 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    35 crt0s += $(src)/arch/i386/lib/id.inc 
    36 crt0s += $(src)/cpu/x86/fpu_enable.inc 
    37 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    38 crt0s += $(src)/cpu/x86/mmx_disable.inc 
    3932 
  • trunk/src/mainboard/via/vt8454c/Makefile.inc

    r5150 r5162  
    2727 
    2828initobj-y += crt0.o 
    29 # FIXME in $(top)/Makefile 
    30 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    31 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    32 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    33 crt0s += $(src)/arch/i386/lib/id.inc 
    34 crt0s += $(src)/cpu/via/car/cache_as_ram.inc 
    35 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    3629 
    3730ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
  • trunk/src/mainboard/winent/pl6064/Makefile.inc

    r5158 r5162  
    77 
    88initobj-y += crt0.o 
    9 crt0s := $(src)/cpu/x86/16bit/entry16.inc 
    10 crt0s += $(src)/cpu/x86/32bit/entry32.inc 
    11 crt0s += $(src)/cpu/x86/16bit/reset16.inc 
    12 crt0s += $(src)/arch/i386/lib/id.inc 
    13 crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc 
    14 crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc 
    159 
    1610ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb 
Note: See TracChangeset for help on using the changeset viewer.