Changeset 5125


Ignore:
Timestamp:
Feb 14, 2010, 5:13:03 PM (5 years ago)
Author:
uwe
Message:

Add w83627hf_set_clksel_48() function which sets CLKSEL to 48MHz.

The Win Ent platforms are using the Winbond W83627HG part, but this part does
not appear to enable 48MHz clock by default as claimed in the datasheet.

Signed-off-by: Anish K Patel <anishp@…>
Acked-by: Uwe Hermann <uwe@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/superio/winbond/w83627hf/w83627hf_early_serial.c

    r4993 r5125  
    4646        pnp_exit_ext_func_mode(dev);
    4747}
     48
     49static void w83627hf_set_clksel_48(device_t dev)
     50{
     51        unsigned port = dev >> 8;
     52        pnp_enter_ext_func_mode(dev);
     53        outb(0x24, port);
     54        /* Set CLKSEL (clock input on pin 1) to 48MHz. */
     55        outb(inb(port + 1) | (1 << 6), port + 1);
     56        pnp_exit_ext_func_mode(dev);
     57}
Note: See TracChangeset for help on using the changeset viewer.