Changeset 5118


Ignore:
Timestamp:
Feb 11, 2010, 10:51:04 PM (5 years ago)
Author:
oxygene
Message:

Adapt all uses of CONFIG_XIP_ROM_BASE to use
AUTO_XIP_ROM_BASE (as implemented for tinybootblock) if available.

Signed-off-by: Patrick Georgi <patrick.georgi@…>
Acked-by: Stefan Reinauer <stepan@…>

Location:
trunk/src
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/arch/i386/init/car.S

    r4802 r5118  
    237237
    238238#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
     239#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
     240#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
     241#else
     242#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
     243#endif
    239244        /* enable write base caching so we can do execute in place
    240245         * on the flash rom.
     
    242247        movl    $0x202, %ecx
    243248        xorl    %edx, %edx
    244         movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
     249        movl    $REAL_XIP_ROM_BASE, %eax
     250        orl     $MTRR_TYPE_WRBACK, %eax
    245251        wrmsr
    246252
  • trunk/src/cpu/amd/mtrr/amd_earlymtrr.c

    r4788 r5118  
    4343
    4444#if defined(CONFIG_XIP_ROM_SIZE)
     45#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
     46#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
     47#else
     48#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
     49#endif
    4550        /* enable write through caching so we can do execute in place
    4651         * on the flash rom.
    4752         */
    48         set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
     53        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
    4954#endif
    5055
  • trunk/src/cpu/via/car/cache_as_ram.inc

    r4827 r5118  
    8484        movl    $0x202, %ecx
    8585        xorl    %edx, %edx
    86         movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
     86#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
     87#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
     88#else
     89#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
     90#endif
     91        movl    $REAL_XIP_ROM_BASE, %eax
     92        orl     $MTRR_TYPE_WRBACK, %eax
    8793        wrmsr
    8894
  • trunk/src/cpu/x86/car/cache_as_ram.inc

    r4827 r5118  
    201201
    202202#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
     203#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
     204#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
     205#else
     206#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
     207#endif
    203208        /* enable write base caching so we can do execute in place
    204209         * on the flash rom.
     
    206211        movl    $0x202, %ecx
    207212        xorl    %edx, %edx
    208         movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
     213        movl    $REAL_XIP_ROM_BASE, %eax
     214        orl     $MTRR_TYPE_WRBACK, %eax
    209215        wrmsr
    210216
  • trunk/src/cpu/x86/mtrr/earlymtrr.c

    r4788 r5118  
    101101
    102102#if defined(CONFIG_XIP_ROM_SIZE)
     103#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
     104#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
     105#else
     106#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE
     107#endif
    103108        /* enable write through caching so we can do execute in place
    104109         * on the flash rom.
    105110         */
    106         set_var_mtrr(1, CONFIG_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
     111        set_var_mtrr(1, REAL_XIP_ROM_BASE, CONFIG_XIP_ROM_SIZE, MTRR_TYPE_WRBACK);
    107112#endif
    108113
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