Changeset 5098
- Timestamp:
- Feb 9, 2010 1:00:06 PM (3 years ago)
- File:
-
- 1 edited
-
trunk/src/mainboard/artecgroup/dbe61/romstage.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/mainboard/artecgroup/dbe61/romstage.c
r5092 r5098 116 116 } 117 117 118 static void cs5536_setup_onchipuart2(void)119 {120 msr_t msr;121 122 /* GPIO4 - UART2_TX */123 /* Set: Output Enable (0x4) */124 outl(GPIOL_4_SET, GPIO_IO_BASE + GPIOL_OUTPUT_ENABLE);125 /* Set: OUTAUX1 Select (0x10) */126 outl(GPIOL_4_SET, GPIO_IO_BASE + GPIOL_OUT_AUX1_SELECT);127 /* GPIO4 - UART2_RX */128 /* Set: Input Enable (0x20) */129 outl(GPIOL_3_SET, GPIO_IO_BASE + GPIOL_INPUT_ENABLE);130 /* Set: INAUX1 Select (0x34) */131 outl(GPIOL_3_SET, GPIO_IO_BASE + GPIOL_IN_AUX1_SELECT);132 133 /* Set: GPIO 3 + 3 Pull Up (0x18) */134 outl(GPIOL_3_SET | GPIOL_4_SET, GPIO_IO_BASE + GPIOL_PULLUP_ENABLE);135 136 /* set address to 3F8 */137 msr = rdmsr(MDD_LEG_IO);138 msr.lo |= 0x7 << 20;139 wrmsr(MDD_LEG_IO, msr);140 141 /* Bit 1 = DEVEN (device enable)142 * Bit 4 = EN_BANKS (allow access to the upper banks143 */144 msr.lo = (1 << 4) | (1 << 1);145 msr.hi = 0;146 147 /* enable COM2 */148 wrmsr(MDD_UART2_CONF, msr);149 }150 151 118 void cache_as_ram_main(void) 152 119 { … … 167 134 */ 168 135 /* cs5536_disable_internal_uart disable them. Set them up now... */ 169 cs5536_setup_onchipuart 2(); /* dbe61 uses UART2 as COM1 */136 cs5536_setup_onchipuart(2); /* dbe61 uses UART2 as COM1 */ 170 137 mb_gpio_init(); 171 138 uart_init();
Note: See TracChangeset
for help on using the changeset viewer.
