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Timestamp:
11/13/01 04:43:37 (7 years ago)
Author:
ebiederm
Message:

- Delayed commit of code for the ASUS A7M motherboard
- VIA 686 cleanups from the A7M code (it now works in a different pci slot).
- Update of assembly printing routines to use the debug levels:

TTYS0_TX_CHAR now becomes CONSOLE_<LEVEL>_TX_CHAR.
It's more verbose but now the controls are the same as with the C code.

- Break off of loglevel.h from printk.h. loglevel.h is safe for both

the assembly routines and the C code to include.

- Next round of commits for the supermicro p4dc6
- SMP setup updates (Rons board is broken)

I now allow the other SMP processors to report their existence.
I really need to add a minimum time to run but that hasn't happened yet.

- SMP per motherboard table of apicids, as the assumption that they

would always be 0 & 1 with only two cpus fails.

- RDRAM setup updates. The code isn't done but it now works on more

than one board at a time.

- More cacheram work. Minor bug fixes and some macros to use it from C.
- Entry point changes so we no longer have to jump over our gdt.
- Added/Audited the cpufixup for the i786
- IDE intialization for the 82801 ich2 chip.

Location:
trunk/LinuxBIOSv1/romimages
Files:
3 modified

Legend:

Unmodified
Added
Removed
  • trunk/LinuxBIOSv1/romimages/RON_VIA_SPD/crt0.S

    r235 r406  
    3333 
    3434#include <pc80/serial.inc> 
     35#include <arch/i386/lib/console.inc> 
    3536#include <pc80/i8259.inc> 
    3637/* 
    3738 */ 
    3839 
    39         TTYS0_TX_STRING($ttyS0_test) 
     40        CONSOLE_DEBUG_TX_STRING($ttyS0_test) 
    4041         
    4142        /* initialize the RAM */ 
     
    6465 */ 
    6566        intel_chip_post_macro(0x11)     /* post 11 */ 
    66         TTYS0_TX_STRING($str_after_ram) 
     67        CONSOLE_DEBUG_TX_STRING($str_after_ram) 
    6768 
    6869        cld                             /* clear direction flag */ 
     
    7677.Lnodata: 
    7778        intel_chip_post_macro(0x12)     /* post 12 */ 
    78         TTYS0_TX_STRING($str_after_copy) 
     79        CONSOLE_DEBUG_TX_STRING($str_after_copy) 
    7980         
    8081        /** clear stack */ 
     
    100101 */  
    101102        intel_chip_post_macro(0xfe)     /* post fe */ 
    102         TTYS0_TX_STRING($str_pre_main) 
     103        CONSOLE_DEBUG_TX_STRING($str_pre_main) 
    103104 
    104105        /* set new stack */ 
  • trunk/LinuxBIOSv1/romimages/RON_VT5259A/crt0.S

    r235 r406  
    3333 
    3434#include <pc80/serial.inc> 
     35#include <arch/i386/lib/console.inc> 
    3536#include <pc80/i8259.inc> 
    3637/* 
    3738 */ 
    3839 
    39         TTYS0_TX_STRING($ttyS0_test) 
     40        CONSOLE_DEBUG_TX_STRING($ttyS0_test) 
    4041         
    4142        /* initialize the RAM */ 
     
    6465 */ 
    6566        intel_chip_post_macro(0x11)     /* post 11 */ 
    66         TTYS0_TX_STRING($str_after_ram) 
     67        CONSOLE_DEBUG_TX_STRING($str_after_ram) 
    6768 
    6869        cld                             /* clear direction flag */ 
     
    7677.Lnodata: 
    7778        intel_chip_post_macro(0x12)     /* post 12 */ 
    78         TTYS0_TX_STRING($str_after_copy) 
     79        CONSOLE_DEBUG_TX_STRING($str_after_copy) 
    7980         
    8081        /** clear stack */ 
     
    100101 */  
    101102        intel_chip_post_macro(0xfe)     /* post fe */ 
    102         TTYS0_TX_STRING($str_pre_main) 
     103        CONSOLE_DEBUG_TX_STRING($str_pre_main) 
    103104 
    104105        /* set new stack */ 
  • trunk/LinuxBIOSv1/romimages/RON_VT5426/crt0.S

    r235 r406  
    3030 
    3131#include <pc80/serial.inc> 
     32#include <arch/i386/lib/console.inc> 
    3233#include <pc80/i8259.inc> 
    3334/* 
    3435 */ 
    3536 
    36         TTYS0_TX_STRING($ttyS0_test) 
     37        CONSOLE_DEBUG_TX_STRING($ttyS0_test) 
    3738         
    3839        /* initialize the RAM */ 
     
    5960 */ 
    6061        intel_chip_post_macro(0x11)     /* post 11 */ 
    61         TTYS0_TX_STRING($str_after_ram) 
     62        CONSOLE_DEBUG_TX_STRING($str_after_ram) 
    6263 
    6364        cld                             /* clear direction flag */ 
     
    7172.Lnodata: 
    7273        intel_chip_post_macro(0x12)     /* post 12 */ 
    73         TTYS0_TX_STRING($str_after_copy) 
     74        CONSOLE_DEBUG_TX_STRING($str_after_copy) 
    7475         
    7576        /** clear stack */ 
     
    9596 */  
    9697        intel_chip_post_macro(0xfe)     /* post fe */ 
    97         TTYS0_TX_STRING($str_pre_main) 
     98        CONSOLE_DEBUG_TX_STRING($str_pre_main) 
    9899 
    99100        /* set new stack */