Changeset 3960


Ignore:
Timestamp:
Feb 28, 2009 12:09:55 AM (4 years ago)
Author:
stepan
Message:

Generic approach of putting BIOS tables at the end of memory
(in addition to their low locations)

This adds the kontron 986LCD-M and the i945 as a sample.

Signed-off-by: Stefan Reinauer <stepan@…>
Acked-by: Myles Watson <mylesgw@…>

Location:
trunk/coreboot-v2/src
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • trunk/coreboot-v2/src/arch/i386/boot/tables.c

    r3931 r3960  
     1/* 
     2 * This file is part of the coreboot project. 
     3 * 
     4 * Copyright (C) .... others 
     5 * Copyright (C) 2008-2009 coresystems GmbH 
     6 * 
     7 * This program is free software; you can redistribute it and/or modify 
     8 * it under the terms of the GNU General Public License as published by 
     9 * the Free Software Foundation; version 2 of the License. 
     10 * 
     11 * This program is distributed in the hope that it will be useful, 
     12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 
     13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the 
     14 * GNU General Public License for more details. 
     15 * 
     16 * You should have received a copy of the GNU General Public License 
     17 * along with this program; if not, write to the Free Software 
     18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA 
     19 */ 
    120 
    221/* 2006.1 yhlu add mptable cross 0x467 processing */ 
     
    3958} 
    4059 
     60#if HAVE_HIGH_TABLES == 1 
     61uint64_t high_tables_base = 0; 
     62uint64_t high_tables_size; 
     63#endif 
     64 
    4165struct lb_memory *write_tables(void) 
    4266{ 
     
    4468        unsigned long rom_table_start, rom_table_end; 
    4569 
     70#if HAVE_HIGH_TABLES == 1 
     71        /* Even if high tables are configured, all tables are copied both to the 
     72         * low and the high area, so payloads and OSes don't need to know about 
     73         * the high tables. 
     74         */ 
     75        unsigned long high_table_start, high_table_end=0; 
     76 
     77        if (high_tables_base) { 
     78                printk_debug("High Tables Base is %lx.\n", high_tables_base); 
     79                high_table_start = high_tables_base; 
     80                high_table_end = high_tables_base; 
     81        } else { 
     82                printk_debug("High Tables Base is not set.\n"); 
     83        } 
     84#endif 
     85 
    4686        rom_table_start = 0xf0000;  
    4787        rom_table_end =   0xf0000; 
     
    5494        post_code(0x9a); 
    5595 
     96#if HAVE_LOW_TABLES == 1 
    5697        /* This table must be betweeen 0xf0000 & 0x100000 */ 
    5798        rom_table_end = write_pirq_routing_table(rom_table_end); 
    5899        rom_table_end = (rom_table_end + 1023) & ~1023; 
     100#endif 
     101#if HAVE_HIGH_TABLES == 1 
     102        if (high_tables_base) { 
     103                high_table_end = write_pirq_routing_table(high_table_end); 
     104                high_table_end = (high_table_end + 1023) & ~1023; 
     105        } 
     106#endif 
    59107 
    60108        /* Write ACPI tables */ 
     
    62110         * pushes coreboot table out of first 4K if set up in low table area  
    63111         */ 
     112#if HAVE_LOW_TABLES == 1 
    64113        rom_table_end = write_acpi_tables(rom_table_end); 
    65114        rom_table_end = (rom_table_end+1023) & ~1023; 
    66  
     115#endif 
     116#if HAVE_HIGH_TABLES == 1 
     117        if (high_tables_base) { 
     118                high_table_end = write_acpi_tables(high_table_end); 
     119                high_table_end = (high_table_end+1023) & ~1023; 
     120        } 
     121#endif 
    67122        /* copy the smp block to address 0 */ 
    68123        post_code(0x96); 
    69124 
    70125        /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */ 
     126#if HAVE_LOW_TABLES == 1 
    71127        new_low_table_end = write_smp_table(low_table_end); // low_table_end is 0x10 at this point 
    72  
    73 #if HAVE_MP_TABLE==1 
     128#endif 
     129#if HAVE_HIGH_TABLES == 1 
     130        if (high_tables_base) { 
     131                high_table_end = write_smp_table(high_table_end); 
     132                high_table_end = (high_table_end+1023) & ~1023; 
     133        } 
     134#endif 
     135 
     136#if HAVE_MP_TABLE == 1 
    74137        /* Don't write anything in the traditional x86 BIOS data segment, 
    75138         * for example the linux kernel smp need to use 0x467 to pass reset vector 
     
    105168 
    106169        // Relocate the GDT to reserved memory, so it won't get clobbered 
    107         move_gdt(low_table_end); 
    108         low_table_end += &gdt_end - &gdt; 
     170#if HAVE_HIGH_TABLES == 1 
     171        if (high_tables_base) { 
     172                move_gdt(high_table_end); 
     173                high_table_end += &gdt_end - &gdt; 
     174                high_table_end = (high_table_end+1023) & ~1023; 
     175        } else { 
     176#endif 
     177                move_gdt(low_table_end); 
     178                low_table_end += &gdt_end - &gdt; 
     179#if HAVE_HIGH_TABLES == 1 
     180        } 
     181#endif 
    109182 
    110183#if CONFIG_MULTIBOOT 
     
    120193                              rom_table_start, rom_table_end); 
    121194 
     195#if 0 && HAVE_HIGH_TABLES == 1 
     196        /* This is currently broken and should be severely refactored. Ideally 
     197         * we only have a pointer to the coreboot table in the low memory, so 
     198         * anyone can find the real position. 
     199         * write_coreboot_table does a lot more than just writing the coreboot 
     200         * table. It magically decides where the table should go, and therefore 
     201         * it consumes two base addresses. If we call write_coreboot_table like 
     202         * below, we get weird effects. 
     203         */ 
     204        /* And we want another copy in high area because the low area might be 
     205         * corrupted 
     206         */ 
     207        if (high_tables_base) { 
     208                write_coreboot_table(high_table_start, high_table_end, 
     209                                      high_table_start, high_table_end); 
     210        } 
     211#endif 
     212  
    122213        return get_lb_mem(); 
    123214} 
  • trunk/coreboot-v2/src/config/Options.lb

    r3888 r3960  
    11101110        export always 
    11111111        comment "Enable if the mainboard/chipset requires extra entries in the memory map" 
     1112end 
     1113 
     1114define HAVE_LOW_TABLES 
     1115        default 1 
     1116        export always 
     1117        comment "Enable if ACPI, PIRQ, MP tables are supposed to live in the low megabyte" 
     1118end 
     1119 
     1120define HAVE_HIGH_TABLES 
     1121        default 0 
     1122        export always 
     1123        comment "Enable if ACPI, PIRQ, MP tables are supposed to live at top of memory" 
    11121124end 
    11131125 
  • trunk/coreboot-v2/src/include/boot/tables.h

    r3057 r3960  
    44#include <boot/coreboot_tables.h> 
    55 
     6void lb_add_memory_range(struct lb_memory *mem, 
     7        uint32_t type, uint64_t start, uint64_t size); 
     8 
    69struct lb_memory *write_tables(void); 
    710 
  • trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/Options.lb

    r3886 r3960  
    3030uses LB_CKS_LOC 
    3131uses HAVE_ACPI_TABLES 
     32uses HAVE_MAINBOARD_RESOURCES 
     33uses HAVE_HIGH_TABLES 
    3234# SMP 
    3335uses CONFIG_SMP 
     
    161163## 
    162164default HAVE_ACPI_TABLES=1 
     165default HAVE_MAINBOARD_RESOURCES=1 
     166default HAVE_HIGH_TABLES=0 
    163167 
    164168## 
  • trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/acpi_tables.c

    r3704 r3960  
    290290        printk_debug("ACPI:     * DMI (Linux workaround)\n"); 
    291291        memcpy((void *)0xfff80, dmi_table, DMI_TABLE_SIZE); 
     292#if HAVE_HIGH_TABLES == 1 
     293        memcpy((void *)current, dmi_table, DMI_TABLE_SIZE); 
     294        current += DMI_TABLE_SIZE; 
     295        ALIGN_CURRENT; 
     296#endif 
    292297 
    293298        printk_info("ACPI: done.\n"); 
  • trunk/coreboot-v2/src/mainboard/kontron/986lcd-m/mainboard.c

    r3954 r3960  
    2222 
    2323#include <device/device.h> 
     24#include <console/console.h> 
     25#include <boot/tables.h> 
    2426#include "chip.h" 
     27 
     28/* in arch/i386/boot/tables.c */ 
     29extern uint64_t high_tables_base, high_tables_size; 
     30 
     31/* in northbridge/intel/i945/northbridge.c */ 
     32extern uint64_t uma_memory_base, uma_memory_size; 
     33 
     34int add_mainboard_resources(struct lb_memory *mem) 
     35{ 
     36#if HAVE_HIGH_TABLES == 1 
     37        printk_debug("Adding high table area\n"); 
     38        lb_add_memory_range(mem, LB_MEM_TABLE, 
     39                high_tables_base, high_tables_size); 
     40#endif 
     41        printk_debug("Adding UMA memory area\n"); 
     42        lb_add_memory_range(mem, LB_MEM_RESERVED,  
     43                uma_memory_base, uma_memory_size); 
     44 
     45        return 0; 
     46} 
    2547 
    2648struct chip_operations mainboard_ops = { 
  • trunk/coreboot-v2/src/northbridge/intel/i945/northbridge.c

    r3715 r3960  
    9494} 
    9595 
     96#if HAVE_HIGH_TABLES==1 
     97#define HIGH_TABLES_SIZE 64     // maximum size of high tables in KB 
     98extern uint64_t high_tables_base, high_tables_size; 
     99#endif 
     100uint64_t uma_memory_base=0, uma_memory_size=0; 
     101 
    96102static void pci_domain_set_resources(device_t dev) 
    97103{ 
     
    99105        uint8_t tolud, reg8; 
    100106        uint16_t reg16; 
    101         unsigned long long tomk, tolmk; 
     107        unsigned long long tomk; 
    102108 
    103109        pci_tolm = find_pci_tolm(&dev->link[0]); 
     
    121127                case 0: 
    122128                        tseg_size = 1024; 
    123                         break;   
     129                        break;  /* TSEG = 1M */ 
    124130                case 1: 
    125131                        tseg_size = 2048; 
    126                         break;   
     132                        break;  /* TSEG = 2M */ 
    127133                case 2: 
    128134                        tseg_size = 8192; 
    129                         break;   
     135                        break;  /* TSEG = 8M */ 
    130136                } 
    131137 
     
    151157                printk_debug("%dM UMA\n", uma_size >> 10); 
    152158                tomk -= uma_size; 
     159 
     160                /* For reserving UMA memory in the memory map */ 
     161                uma_memory_base = tomk * 1024ULL; 
     162                uma_memory_size = uma_size * 1024ULL; 
    153163        } 
    154164 
     
    156166         * number is always 0 
    157167         */ 
    158         printk_info("Available memory: %dK", tomk); 
    159         printk_info(" (%dM)\n", (tomk >> 10)); 
    160  
    161         tolmk = tomk; 
     168        printk_info("Available memory: %dK", (uint32_t)tomk); 
     169        printk_info(" (%dM)\n", (uint32_t)(tomk >> 10)); 
    162170 
    163171        /* Report the memory regions */ 
    164172        ram_resource(dev, 3, 0, 640); 
    165         ram_resource(dev, 4, 768, (tolmk - 768)); 
     173        ram_resource(dev, 4, 768, (tomk - 768)); 
    166174        if (tomk > 4 * 1024 * 1024) { 
    167175                ram_resource(dev, 5, 4096 * 1024, tomk - 4 * 1024 * 1024); 
     
    169177 
    170178        assign_resources(&dev->link[0]); 
     179 
     180#if HAVE_HIGH_TABLES==1 
     181        /* Leave some space for ACPI, PIRQ and MP tables */ 
     182        high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; 
     183        high_tables_size = HIGH_TABLES_SIZE * 1024; 
     184#endif 
    171185} 
    172186 
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