| 197 | | u32 reg32; |
| 198 | | u32 code = (0 & 0x3); |
| 199 | | |
| 200 | | reg32 = pci_read_config32(dev, GEN_CNTL); |
| 201 | | reg32 |= (1 << 17); /* Enable HPET. */ |
| 202 | | /* |
| 203 | | * Bits [16:15] Memory Address Range |
| 204 | | * 00 FED0_0000h - FED0_03FFh |
| 205 | | * 01 FED0_1000h - FED0_13FFh |
| 206 | | * 10 FED0_2000h - FED0_23FFh |
| 207 | | * 11 FED0_3000h - FED0_33FFh |
| 208 | | */ |
| 209 | | reg32 &= ~(3 << 15); /* Clear it */ |
| 210 | | reg32 |= (code << 15); |
| 211 | | /* TODO: reg32 is never written to anywhere? */ |
| 212 | | printk_debug("Enabling HPET @0x%x\n", HPET_ADDR | (code << 12)); |
| | 197 | /* TODO */ |