- Timestamp:
- 09/20/08 00:58:59 (4 months ago)
- Files:
-
- 1 modified
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- Unmodified
- Added
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trunk/coreboot-v2/src/southbridge/via/k8t890/k8t890_dram.c
r3183 r3587 64 64 /* The Address Next to the Last Valid DRAM Address */ 65 65 pci_write_config16(dev, 0x88, (msr.lo >> 24) | reg); 66 67 } 68 69 static void dram_enable_k8m890(struct device *dev) 70 { 71 dram_enable(dev); 72 73 /* enable VGA, so the bridges gets VGA_EN and resources are set */ 74 pci_write_config8(dev, 0xa1, 0x80); 66 75 } 67 76 … … 114 123 printk_debug("VIA FB proposed base: %llx\n", proposed_base); 115 124 116 /* enable UMA but no FB */125 /* Step 1: enable UMA but no FB */ 117 126 pci_write_config8(dev, 0xa1, 0x80); 118 127 119 /* 27:21 goes to 7:1, 0 is enable CPU access */ 120 tmp = (proposed_base >> 20) | 0x1; 121 pci_write_config8(dev, 0xa0, tmp); 122 123 /* 31:28 goes to 3:0 */ 124 tmp = ((proposed_base >> 28) & 0xf); 125 tmp = ((log2(K8M890_FBSIZEMB) - 2) << 4); 126 tmp |= 0x80; 128 /* Step 2: enough is just the FB size, the CPU accessible address is not needed */ 129 tmp = ((log2(K8M890_FBSIZEMB) - 2) << 4) | 0x80; 127 130 pci_write_config8(dev, 0xa1, tmp); 128 131 … … 142 145 .set_resources = pci_dev_set_resources, 143 146 .enable_resources = pci_dev_enable_resources, 144 .enable = dram_enable ,147 .enable = dram_enable_k8m890, 145 148 .init = dram_init_fb, 146 149 .ops_pci = 0,
