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Timestamp:
07/01/08 01:45:22 (5 months ago)
Author:
stepan
Message:

First attempt to clean up SPI probing and create a common
construct: the flash bus.

At some point the flash bus will be part of struct flashchip.

Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.

Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.

Signed-off-by: Stefan Reinauer <stepan@…>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@…>

Files:
1 modified

Legend:

Unmodified
Added
Removed
  • trunk/util/flashrom/ichspi.c

    r3398 r3401  
    132132{ 
    133133        volatile uint32_t regval; 
    134         regval = *(volatile uint32_t *) ((uint8_t *) ich_spibar + X); 
     134        regval = *(volatile uint32_t *) ((uint8_t *) spibar + X); 
    135135        return regval; 
    136136} 
     
    139139{ 
    140140        volatile uint16_t regval; 
    141         regval = *(volatile uint16_t *) ((uint8_t *) ich_spibar + X); 
     141        regval = *(volatile uint16_t *) ((uint8_t *) spibar + X); 
    142142        return regval; 
    143143} 
    144144 
    145 #define REGWRITE32(X,Y) (*(uint32_t *)((uint8_t *)ich_spibar+X)=Y) 
    146 #define REGWRITE16(X,Y) (*(uint16_t *)((uint8_t *)ich_spibar+X)=Y) 
    147 #define REGWRITE8(X,Y)  (*(uint8_t *)((uint8_t *)ich_spibar+X)=Y) 
     145#define REGWRITE32(X,Y) (*(uint32_t *)((uint8_t *)spibar+X)=Y) 
     146#define REGWRITE16(X,Y) (*(uint16_t *)((uint8_t *)spibar+X)=Y) 
     147#define REGWRITE8(X,Y)  (*(uint8_t *)((uint8_t *)spibar+X)=Y) 
    148148 
    149149/* Common SPI functions */ 
     
    176176{ 
    177177        uint8_t a; 
    178         uint16_t temp16; 
    179         uint32_t temp32; 
     178        uint16_t preop, optype; 
     179        uint32_t opmenu[2]; 
    180180 
    181181        /* Program Prefix Opcodes */ 
    182         temp16 = 0; 
     182        preop = 0; 
    183183        /* 0:7 Prefix Opcode 1 */ 
    184         temp16 = (op->preop[0]); 
     184        preop = (op->preop[0]); 
    185185        /* 8:16 Prefix Opcode 2 */ 
    186         temp16 |= ((uint16_t) op->preop[1]) << 8; 
    187         if ((ich7_detected) || (viaspi_detected)) { 
    188                 REGWRITE16(ICH7_REG_PREOP, temp16); 
    189         } else if (ich9_detected) { 
    190                 REGWRITE16(ICH9_REG_PREOP, temp16); 
    191         } 
    192  
     186        preop |= ((uint16_t) op->preop[1]) << 8; 
     187         
    193188        /* Program Opcode Types 0 - 7 */ 
    194         temp16 = 0; 
     189        optype = 0; 
    195190        for (a = 0; a < 8; a++) { 
    196                 temp16 |= ((uint16_t) op->opcode[a].spi_type) << (a * 2); 
    197         } 
    198  
    199         if ((ich7_detected) || (viaspi_detected)) { 
    200                 REGWRITE16(ICH7_REG_OPTYPE, temp16); 
    201         } else if (ich9_detected) { 
    202                 REGWRITE16(ICH9_REG_OPTYPE, temp16); 
    203         } 
    204  
    205  
     191                optype |= ((uint16_t) op->opcode[a].spi_type) << (a * 2); 
     192        } 
     193         
    206194        /* Program Allowable Opcodes 0 - 3 */ 
    207         temp32 = 0; 
     195        opmenu[0] = 0; 
    208196        for (a = 0; a < 4; a++) { 
    209                 temp32 |= ((uint32_t) op->opcode[a].opcode) << (a * 8); 
    210         } 
    211  
    212         if ((ich7_detected) || (viaspi_detected)) { 
    213                 REGWRITE32(ICH7_REG_OPMENU, temp32); 
    214         } else if (ich9_detected) { 
    215                 REGWRITE32(ICH9_REG_OPMENU, temp32); 
    216         } 
    217  
     197                opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); 
     198        } 
    218199 
    219200        /*Program Allowable Opcodes 4 - 7 */ 
    220         temp32 = 0; 
     201        opmenu[1] = 0; 
    221202        for (a = 4; a < 8; a++) { 
    222                 temp32 |= 
    223                     ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); 
    224         } 
    225  
    226         if ((ich7_detected) || (viaspi_detected)) { 
    227                 REGWRITE32(ICH7_REG_OPMENU + 4, temp32); 
    228         } else if (ich9_detected) { 
    229                 REGWRITE32(ICH9_REG_OPMENU + 4, temp32); 
     203                opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); 
     204        } 
     205 
     206        switch (flashbus) { 
     207        case BUS_TYPE_ICH7_SPI:  
     208        case BUS_TYPE_VIA_SPI:  
     209                REGWRITE16(ICH7_REG_PREOP, preop); 
     210                REGWRITE16(ICH7_REG_OPTYPE, optype); 
     211                REGWRITE32(ICH7_REG_OPMENU, opmenu[0]); 
     212                REGWRITE32(ICH7_REG_OPMENU + 4, opmenu[1]); 
     213                break; 
     214        case BUS_TYPE_ICH9_SPI: 
     215                REGWRITE16(ICH9_REG_PREOP, preop); 
     216                REGWRITE16(ICH9_REG_OPTYPE, optype); 
     217                REGWRITE32(ICH9_REG_OPMENU, opmenu[0]); 
     218                REGWRITE32(ICH9_REG_OPMENU + 4, opmenu[1]); 
     219                break; 
     220        default: 
     221                printf_debug("%s: unsupported chipset\n", __FUNCTION__); 
     222                return -1; 
    230223        } 
    231224 
     
    341334{ 
    342335        int write_cmd = 0; 
     336        int timeout; 
    343337        uint32_t temp32; 
    344338        uint32_t a; 
     
    411405 
    412406        /*wait for cycle complete */ 
    413         while ((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) { 
    414                 /*TODO; Do something that this can't lead into an endless loop. but some 
    415                  * commands may cause this to be last more than 30 seconds */ 
     407        timeout = 1000 * 60;    // 60s is a looong timeout. 
     408        while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { 
     409                myusec_delay(1000); 
     410        } 
     411        if (!timeout) { 
     412                printf_debug("timeout\n"); 
    416413        } 
    417414 
     
    439436                      uint8_t datalength, uint8_t * data) 
    440437{ 
    441         if (ich7_detected) 
     438        switch (flashbus) { 
     439        case BUS_TYPE_VIA_SPI: 
     440                return ich7_run_opcode(nr, op, offset, datalength, data, 16); 
     441        case BUS_TYPE_ICH7_SPI: 
    442442                return ich7_run_opcode(nr, op, offset, datalength, data, 64); 
    443         else if (viaspi_detected) 
    444                 return ich7_run_opcode(nr, op, offset, datalength, data, 16); 
    445         else if (ich9_detected) 
     443        case BUS_TYPE_ICH9_SPI: 
    446444                return ich9_run_opcode(nr, op, offset, datalength, data); 
     445        default: 
     446                printf_debug("%s: unsupported chipset\n", __FUNCTION__); 
     447        } 
    447448 
    448449        /* If we ever get here, something really weird happened */ 
     
    542543        int maxdata = 64; 
    543544 
    544         if (viaspi_detected) { 
     545        if (flashbus == BUS_TYPE_VIA_SPI) { 
    545546                maxdata = 16; 
    546547        } 
     
    573574                } 
    574575 
    575         if (viaspi_detected) { 
     576        if (flashbus == BUS_TYPE_VIA_SPI) { 
    576577                maxdata = 16; 
    577578        }