Changeset 3398
- Timestamp:
- 06/30/08 23:38:30 (3 months ago)
- Location:
- trunk/util/flashrom
- Files:
-
- 4 modified
Legend:
- Unmodified
- Added
- Removed
-
trunk/util/flashrom/chipset_enable.c
r3395 r3398 188 188 void *ich_spibar = NULL; 189 189 190 static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name) { 191 uint32_t mmio_base; 192 193 mmio_base = (pci_read_long(dev, 0xbc)) << 8; 194 printf_debug("MMIO base at = 0x%x\n", mmio_base); 195 ich_spibar = mmap(NULL, 0x70, PROT_READ | PROT_WRITE, MAP_SHARED, 196 fd_mem, mmio_base); 197 198 if (ich_spibar == MAP_FAILED) { 199 perror("Can't mmap memory using " MEM_DEV); 200 exit(1); 201 } 202 203 printf_debug("0x6c: 0x%04x (CLOCK/DEBUG)\n", *(uint16_t *)(ich_spibar + 0x6c)); 204 viaspi_detected = 1; 205 return 0; 206 } 207 190 208 static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsigned long spibar) 191 209 { … … 271 289 /* Flag for ICH7 SPI register block */ 272 290 int ich7_detected = 0; 291 int viaspi_detected = 0; 273 292 274 293 static int enable_flash_ich7(struct pci_dev *dev, const char *name) … … 661 680 {0x1106, 0x3177, "VIA VT8235", enable_flash_vt823x}, 662 681 {0x1106, 0x3227, "VIA VT8237", enable_flash_vt823x}, 682 {0x1106, 0x3372, "VIA VT8237S", enable_flash_vt8237s_spi}, 663 683 {0x1106, 0x8324, "VIA CX700", enable_flash_vt823x}, 664 684 {0x1106, 0x0686, "VIA VT82C686", enable_flash_amd8111}, -
trunk/util/flashrom/flash.h
r3393 r3398 372 372 void print_supported_chipsets(void); 373 373 extern int ich7_detected; 374 extern int viaspi_detected; 374 375 extern int ich9_detected; 375 376 extern void *ich_spibar; -
trunk/util/flashrom/ichspi.c
r3397 r3398 42 42 #include "spi.h" 43 43 44 #define MAXDATABYTES 0x4045 46 44 /* ICH9 controller register definition */ 47 45 #define ICH9_REG_FADDR 0x08 /* 32 Bits */ … … 82 80 #define SPIS_FCERR 0x00000008 83 81 82 /* VIA SPI is compatible with ICH7, but maxdata 83 to transfer is 16 bytes. 84 85 DATA byte count on ICH7 is 8:13, on VIA 8:11 86 87 bit 12 is port select CS0 CS1 88 bit 13 is FAST READ enable 89 bit 7 is used with fast read and one shot controls CS de-assert? 90 */ 91 84 92 #define ICH7_REG_SPIC 0x02 /* 16 Bits */ 85 93 #define SPIC_SCGO 0x0002 86 94 #define SPIC_ACS 0x0004 87 95 #define SPIC_SPOP 0x0008 88 #define SPIC_DS 0x400096 #define SPIC_DS 0x4000 89 97 90 98 #define ICH7_REG_SPIA 0x04 /* 32 Bits */ … … 144 152 uint8_t datalength, uint8_t * data); 145 153 static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, 146 int offset );154 int offset, int maxdata); 147 155 static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, 148 int offset );156 int offset, int maxdata); 149 157 static int ich_spi_erase_block(struct flashchip *flash, int offset); 150 158 … … 177 185 /* 8:16 Prefix Opcode 2 */ 178 186 temp16 |= ((uint16_t) op->preop[1]) << 8; 179 if ( ich7_detected) {187 if ((ich7_detected) || (viaspi_detected)) { 180 188 REGWRITE16(ICH7_REG_PREOP, temp16); 181 189 } else if (ich9_detected) { … … 189 197 } 190 198 191 if ( ich7_detected) {199 if ((ich7_detected) || (viaspi_detected)) { 192 200 REGWRITE16(ICH7_REG_OPTYPE, temp16); 193 201 } else if (ich9_detected) { … … 202 210 } 203 211 204 if ( ich7_detected) {212 if ((ich7_detected) || (viaspi_detected)) { 205 213 REGWRITE32(ICH7_REG_OPMENU, temp32); 206 214 } else if (ich9_detected) { … … 216 224 } 217 225 218 if ( ich7_detected) {226 if ((ich7_detected) || (viaspi_detected)) { 219 227 REGWRITE32(ICH7_REG_OPMENU + 4, temp32); 220 228 } else if (ich9_detected) { … … 226 234 227 235 static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset, 228 uint8_t datalength, uint8_t * data )236 uint8_t datalength, uint8_t * data, int maxdata) 229 237 { 230 238 int write_cmd = 0; … … 276 284 if (datalength != 0) { 277 285 temp16 |= SPIC_DS; 278 temp16 |= ((uint 16_t) ((datalength - 1) & 0x3f)) << 8;286 temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8; 279 287 } 280 288 … … 432 440 { 433 441 if (ich7_detected) 434 return ich7_run_opcode(nr, op, offset, datalength, data); 435 else if (ich9_detected) { 442 return ich7_run_opcode(nr, op, offset, datalength, data, 64); 443 else if (viaspi_detected) 444 return ich7_run_opcode(nr, op, offset, datalength, data, 16); 445 else if (ich9_detected) 436 446 return ich9_run_opcode(nr, op, offset, datalength, data); 437 }438 447 439 448 /* If we ever get here, something really weird happened */ … … 456 465 } 457 466 458 static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset )467 static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, int maxdata) 459 468 { 460 469 int page_size = flash->page_size; … … 465 474 offset, page_size, buf); 466 475 467 for (a = 0; a < page_size; a += MAXDATABYTES) {468 if (remaining < MAXDATABYTES) {476 for (a = 0; a < page_size; a += maxdata) { 477 if (remaining < maxdata) { 469 478 470 479 if (run_opcode … … 479 488 if (run_opcode 480 489 (1, curopcodes->opcode[1], 481 offset + (page_size - remaining), MAXDATABYTES,490 offset + (page_size - remaining), maxdata, 482 491 &buf[page_size - remaining]) != 0) { 483 492 printf_debug("Error reading"); 484 493 return 1; 485 494 } 486 remaining -= MAXDATABYTES;495 remaining -= maxdata; 487 496 } 488 497 } … … 492 501 493 502 static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, 494 int offset )503 int offset, int maxdata) 495 504 { 496 505 int page_size = flash->page_size; … … 501 510 offset, page_size, bytes); 502 511 503 for (a = 0; a < page_size; a += MAXDATABYTES) {504 if (remaining < MAXDATABYTES) {512 for (a = 0; a < page_size; a += maxdata) { 513 if (remaining < maxdata) { 505 514 if (run_opcode 506 515 (0, curopcodes->opcode[0], … … 514 523 if (run_opcode 515 524 (0, curopcodes->opcode[0], 516 offset + (page_size - remaining), MAXDATABYTES,525 offset + (page_size - remaining), maxdata, 517 526 &bytes[page_size - remaining]) != 0) { 518 527 printf_debug("Error writing"); 519 528 return 1; 520 529 } 521 remaining -= MAXDATABYTES;530 remaining -= maxdata; 522 531 } 523 532 } … … 531 540 int total_size = flash->total_size * 1024; 532 541 int page_size = flash->page_size; 542 int maxdata = 64; 543 544 if (viaspi_detected) { 545 maxdata = 16; 546 } 533 547 534 548 for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { 535 549 rc = ich_spi_read_page(flash, (void *)(buf + i * page_size), 536 i * page_size );550 i * page_size, maxdata); 537 551 } 538 552 … … 546 560 int page_size = flash->page_size; 547 561 int erase_size = 64 * 1024; 562 int maxdata = 64; 548 563 549 564 spi_disable_blockprotect(); … … 558 573 } 559 574 575 if (viaspi_detected) { 576 maxdata = 16; 577 } 560 578 for (j = 0; j < erase_size / page_size; j++) { 561 579 ich_spi_write_page(flash, (void *)(buf + (i * erase_size) + (j * page_size)), 562 (i * erase_size) + (j * page_size) );580 (i * erase_size) + (j * page_size), maxdata); 563 581 } 564 582 } -
trunk/util/flashrom/spi.c
r3393 r3398 37 37 if (it8716f_flashport) 38 38 return it8716f_spi_command(writecnt, readcnt, writearr, readarr); 39 else if (ich7_detected)40 return ich_spi_command(writecnt, readcnt, writearr, readarr);39 else if ((ich7_detected) || (viaspi_detected)) 40 return ich_spi_command(writecnt, readcnt, writearr, readarr); 41 41 else if (ich9_detected) 42 42 return ich_spi_command(writecnt, readcnt, writearr, readarr); … … 361 361 if (it8716f_flashport) 362 362 return it8716f_spi_chip_read(flash, buf); 363 else if (ich7_detected)364 return ich_spi_read(flash, buf);363 else if ((ich7_detected) || (viaspi_detected)) 364 return ich_spi_read(flash, buf); 365 365 else if (ich9_detected) 366 366 return ich_spi_read(flash, buf); … … 373 373 if (it8716f_flashport) 374 374 return it8716f_spi_chip_write(flash, buf); 375 else if (ich7_detected)376 return ich_spi_write(flash, buf);375 else if ((ich7_detected) || (viaspi_detected)) 376 return ich_spi_write(flash, buf); 377 377 else if (ich9_detected) 378 378 return ich_spi_write(flash, buf);
